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Re: [RFC / CFT] PR c++/66192 - Remove TARGET_RELAXED_ORDERING and use load acquires.
- From: David Edelsohn <dje dot gcc at gmail dot com>
- To: Ramana Radhakrishnan <ramana dot radhakrishnan at foss dot arm dot com>, Steve Munroe <munroesj at linux dot vnet dot ibm dot com>
- Cc: Jason Merrill <jason at redhat dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Jim Wilson <wilson at tuliptree dot org>, Steve Ellcey <sellcey at mips dot com>, Richard Henderson <rth at redhat dot com>
- Date: Fri, 22 May 2015 13:04:33 -0400
- Subject: Re: [RFC / CFT] PR c++/66192 - Remove TARGET_RELAXED_ORDERING and use load acquires.
- Authentication-results: sourceware.org; auth=none
- References: <555F1143 dot 4070606 at foss dot arm dot com> <555F11B6 dot 1070001 at foss dot arm dot com> <555F31CF dot 6060201 at redhat dot com> <CAGWvnykzukDM2aG_QmbeCyOh7+u6xF8snOc13GUHG2RULoQU-g at mail dot gmail dot com> <555F3D09 dot 2070700 at redhat dot com> <555F49FF dot 1070402 at foss dot arm dot com>
On Fri, May 22, 2015 at 11:23 AM, Ramana Radhakrishnan
<ramana.radhakrishnan@foss.arm.com> wrote:
> So on powerpc where targetm.guard_mask_bit is false - this is what I see.
>
>
> {
> static int * p;
>
> static int * p;
> if (<<cleanup_point (unsigned char) *(char *) &(long long int)
> __atomic_load_8 (&_ZGVZ1fvE1p, 2) == 0>>)
> {
> if (<<cleanup_point __cxa_guard_acquire (&_ZGVZ1fvE1p) != 0>>)
> {
> <<cleanup_point <<< Unknown tree: expr_stmt
> TARGET_EXPR <D.2846, 0>;, p = (int *) operator new (4);;, D.2846 = 1;;,
> __cxa_guard_release (&_ZGVZ1fvE1p); >>>>>;
> }
> }
> return <retval> = p;
> }
>
> with the following output - David - is this what you would expect ?
>
>
> 0: addis 2,12,.TOC.-0b@ha
> addi 2,2,.TOC.-0b@l
> .localentry _Z1fv,.-_Z1fv
> mflr %r0
> std %r30,-16(%r1)
> std %r31,-8(%r1)
> .cfi_register 65, 0
> .cfi_offset 30, -16
> .cfi_offset 31, -8
> addis %r30,%r2,_ZGVZ1fvE1p@toc@ha
> addi %r30,%r30,_ZGVZ1fvE1p@toc@l
> std %r0,16(%r1)
> stdu %r1,-64(%r1)
> .cfi_def_cfa_offset 64
> .cfi_offset 65, 16
> addis %r10,%r2,_ZGVZ1fvE1p@toc@ha # gpr load fusion,
> type long
> ld %r10,_ZGVZ1fvE1p@toc@l(%r10)
> cmpw %cr7,%r10,%r10
> bne- %cr7,$+4
> isync
> rlwinm %r9,%r10,0,0xff
> std %r10,32(%r1)
> cmpwi %cr7,%r9,0
> beq %cr7,.L11
> .L9:
> addi %r1,%r1,64
> .cfi_remember_state
> .cfi_def_cfa_offset 0
> addis %r3,%r2,_ZZ1fvE1p@toc@ha # gpr load fusion, type long
> ld %r3,_ZZ1fvE1p@toc@l(%r3)
> ld %r0,16(%r1)
> ld %r30,-16(%r1)
> ld %r31,-8(%r1)
> mtlr %r0
> .cfi_restore 65
> .cfi_restore 31
> .cfi_restore 30
> blr
> .p2align 4,,15
> .L11:
> .cfi_restore_state
> mr %r3,%r30
It looks reasonable, but we really need to examine the code produced
by the final version of the patch for some examples.
Thanks, David