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[PATCH] PR target/66232: -fPIC -fno-plt -mx32 fails to generate indirect branch via GOT


X32 doesn't support indirect branch via 32-bit memory slot since
indirect branch will load 64-bit address from 64-bit memory slot.
Since x32 GOT slot is 64-bit, we should allow indirect branch via GOT
slot for x32.

I am testing it on x32.  OK for master if there is no regression?

Thanks.


H.J.
--
gcc/

	PR target/66232
	* config/i386/constraints.md (Bg): Add a constraint for x32
	call and sibcall memory operand.
	* config/i386/i386.md (*call_x32): New pattern.
	(*sibcall_x32): Likewise.
	(*call_value_x32): Likewise.
	(*sibcall_value_x32): Likewise.
	* config/i386/predicates.md (x32_sibcall_memory_operand): New
	predicate.
	(x32_call_insn_operand): Likewise.
	(x32_sibcall_insn_operand): Likewise.

gcc/testsuite/

	PR target/66232
	* gcc.target/i386/pr66232-1.c: New test.
	* gcc.target/i386/pr66232-2.c: Likewise.
	* gcc.target/i386/pr66232-3.c: Likewise.
	* gcc.target/i386/pr66232-4.c: Likewise.
---
 gcc/config/i386/constraints.md            |  6 ++++++
 gcc/config/i386/i386.md                   | 36 +++++++++++++++++++++++++++++++
 gcc/config/i386/predicates.md             | 26 ++++++++++++++++++++++
 gcc/testsuite/gcc.target/i386/pr66232-1.c | 13 +++++++++++
 gcc/testsuite/gcc.target/i386/pr66232-2.c | 14 ++++++++++++
 gcc/testsuite/gcc.target/i386/pr66232-3.c | 13 +++++++++++
 gcc/testsuite/gcc.target/i386/pr66232-4.c | 13 +++++++++++
 7 files changed, 121 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr66232-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr66232-2.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr66232-3.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr66232-4.c

diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
index 2271bd1..7be8917 100644
--- a/gcc/config/i386/constraints.md
+++ b/gcc/config/i386/constraints.md
@@ -146,10 +146,16 @@
  "@internal Lower SSE register when avoiding REX prefix and all SSE registers otherwise.")
 
 ;; We use the B prefix to denote any number of internal operands:
+;;  g  Call and sibcall memory operand, valid for TARGET_X32
 ;;  s  Sibcall memory operand, not valid for TARGET_X32
 ;;  w  Call memory operand, not valid for TARGET_X32
 ;;  z  Constant call address operand.
 
+(define_constraint "Bg"
+  "@internal Call/sibcall memory operand for x32."
+  (and (match_test "TARGET_X32")
+       (match_operand 0 "x32_sibcall_memory_operand")))
+
 (define_constraint "Bs"
   "@internal Sibcall memory operand."
   (and (not (match_test "TARGET_X32"))
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index aefca43..a1ae05a 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -11659,6 +11659,14 @@
   "* return ix86_output_call_insn (insn, operands[0]);"
   [(set_attr "type" "call")])
 
+(define_insn "*call_x32"
+  [(call (mem:QI (zero_extend:DI
+		   (match_operand:SI 0 "x32_call_insn_operand" "Bg")))
+	 (match_operand 1))]
+  "TARGET_X32 && !SIBLING_CALL_P (insn)"
+  "* return ix86_output_call_insn (insn, operands[0]);"
+  [(set_attr "type" "call")])
+
 (define_insn "*sibcall"
   [(call (mem:QI (match_operand:W 0 "sibcall_insn_operand" "UBsBz"))
 	 (match_operand 1))]
@@ -11666,6 +11674,14 @@
   "* return ix86_output_call_insn (insn, operands[0]);"
   [(set_attr "type" "call")])
 
+(define_insn "*sibcall_x32"
+  [(call (mem:QI (zero_extend:DI
+		   (match_operand:SI 0 "x32_sibcall_insn_operand" "Bg")))
+	 (match_operand 1))]
+  "TARGET_X32 && SIBLING_CALL_P (insn)"
+  "* return ix86_output_call_insn (insn, operands[0]);"
+  [(set_attr "type" "call")])
+
 (define_insn "*sibcall_memory"
   [(call (mem:QI (match_operand:W 0 "memory_operand" "m"))
 	 (match_operand 1))
@@ -11825,6 +11841,16 @@
   "* return ix86_output_call_insn (insn, operands[1]);"
   [(set_attr "type" "callv")])
 
+(define_insn "*call_value_x32"
+  [(set (match_operand 0)
+	(call (mem:QI
+		(zero_extend:DI
+		  (match_operand:SI 1 "x32_call_insn_operand" "Bg")))
+	      (match_operand 2)))]
+  "TARGET_X32 && !SIBLING_CALL_P (insn)"
+  "* return ix86_output_call_insn (insn, operands[1]);"
+  [(set_attr "type" "callv")])
+
 (define_insn "*sibcall_value"
   [(set (match_operand 0)
 	(call (mem:QI (match_operand:W 1 "sibcall_insn_operand" "UBsBz"))
@@ -11833,6 +11859,16 @@
   "* return ix86_output_call_insn (insn, operands[1]);"
   [(set_attr "type" "callv")])
 
+(define_insn "*sibcall_value_x32"
+  [(set (match_operand 0)
+	(call (mem:QI
+		(zero_extend:DI
+		  (match_operand:SI 1 "x32_sibcall_insn_operand" "Bg")))
+	      (match_operand 2)))]
+  "TARGET_X32 && SIBLING_CALL_P (insn)"
+  "* return ix86_output_call_insn (insn, operands[1]);"
+  [(set_attr "type" "callv")])
+
 (define_insn "*sibcall_value_memory"
   [(set (match_operand 0)
  	(call (mem:QI (match_operand:W 1 "memory_operand" "m"))
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 26dd3e1..40fdd20 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -606,6 +606,32 @@
        (and (not (match_test "TARGET_X32"))
 	    (match_operand 0 "sibcall_memory_operand"))))
 
+;; Return true if OP is a memory operand that can be used in x32 calls
+;; and sibcalls.  Only th 64-bit GOT slot is allowed.
+(define_predicate "x32_sibcall_memory_operand"
+  (and (match_operand 0 "memory_operand")
+       (match_test "CONSTANT_P (XEXP (op, 0))")
+       (match_test "GET_CODE (XEXP (XEXP (op, 0), 0)) == UNSPEC")
+       (match_test "XINT (XEXP (XEXP (op, 0), 0), 1) == UNSPEC_GOTPCREL")))
+
+;; Test for a valid operand for an x32 call instruction.
+;; Allow constant call address operands in Pmode only.
+(define_special_predicate "x32_call_insn_operand"
+  (ior (match_test "constant_call_address_operand
+		     (op, mode == VOIDmode ? mode : Pmode)")
+       (match_operand 0 "call_register_no_elim_operand")
+       (and (match_test "TARGET_X32")
+	    (match_operand 0 "x32_sibcall_memory_operand"))))
+
+;; Similarly, but for tail x32 calls, in which we cannot allow memory
+;; references.
+(define_special_predicate "x32_sibcall_insn_operand"
+  (ior (match_test "constant_call_address_operand
+		     (op, mode == VOIDmode ? mode : Pmode)")
+       (match_operand 0 "register_no_elim_operand")
+       (and (match_test "TARGET_X32")
+	    (match_operand 0 "x32_sibcall_memory_operand"))))
+
 ;; Match exactly zero.
 (define_predicate "const0_operand"
   (match_code "const_int,const_wide_int,const_double,const_vector")
diff --git a/gcc/testsuite/gcc.target/i386/pr66232-1.c b/gcc/testsuite/gcc.target/i386/pr66232-1.c
new file mode 100644
index 0000000..ba4a5ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr66232-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fpic -fno-plt" } */
+
+extern void bar (void);
+
+void
+foo (void)
+{
+  bar ();
+}
+
+/* { dg-final { scan-assembler "jmp\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr66232-2.c b/gcc/testsuite/gcc.target/i386/pr66232-2.c
new file mode 100644
index 0000000..f05d7c5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr66232-2.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fpic -fno-plt" } */
+
+extern void bar (void);
+
+int
+foo (void)
+{
+  bar ();
+  return 0;
+}
+
+/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr66232-3.c b/gcc/testsuite/gcc.target/i386/pr66232-3.c
new file mode 100644
index 0000000..ee3176c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr66232-3.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fpic -fno-plt" } */
+
+extern int bar (void);
+
+int
+foo (void)
+{
+  return bar ();
+}
+
+/* { dg-final { scan-assembler "jmp\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr66232-4.c b/gcc/testsuite/gcc.target/i386/pr66232-4.c
new file mode 100644
index 0000000..5fa0ded
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr66232-4.c
@@ -0,0 +1,13 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -fpic -fno-plt" } */
+
+extern int bar (void);
+
+int
+foo (void)
+{
+  return bar () + 1;
+}
+
+/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */
-- 
2.1.0


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