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Re: [Patch] [AArch64] PR target 66049: fix add/extend gcc test suite failures

Hi Venkat,

On 19/05/15 16:37, Kumar, Venkataramanan wrote:
Hi Maintainers,

Please find the attached patch, that fixes add/extend gcc test suite failures in Aarch64 target.

These tests started to fail after we prevented combiner from converting shift RTX to mult RTX, when the RTX is not inside a memory operation (r222874) .
Now I have added new add/extend patterns which are based on shift operations,  to fix these cases.

Testing status with the patch.

(1) GCC bootstrap on AArch64 successful.
(2)  SPEC2006 INT runs did not show any degradation.

Does that mean there was no performance regression? Or no codegen difference?
What I'd expect from this patch is that the codegen would be the same as before the combine patch
(r222874). A performance difference can sometimes be hard to measure even at worse code quality.
Can you please confirm that on SPEC2006 INT the adds and shifts are now back to being combined
into a single instruction?


(3) gcc regression testing passed.

# Comparing 3 common sum files
## /bin/sh ./gcc-fsf-trunk/contrib/compare_tests  /tmp/gxx-sum1.24998 /tmp/gxx-sum2.24998
Tests that now work, but didn't before: scan-assembler adds\tw[0-9]+, w[0-9]+, w[0-9]+, lsl 3 scan-assembler adds\tx[0-9]+, x[0-9]+, x[0-9]+, lsl 3 scan-assembler-times adds\tx[0-9]+, x[0-9]+, x[0-9]+, sxtw 2 scan-assembler add\tw[0-9]+,.*uxth #?1 scan-assembler add\tx[0-9]+,.*uxtw #?3 scan-assembler sub\tw[0-9]+,.*uxth #?1 scan-assembler sub\tx[0-9]+,.*uxth #?1 scan-assembler sub\tx[0-9]+,.*uxtw #?3 scan-assembler subs\tw[0-9]+, w[0-9]+, w[0-9]+, lsl 3 scan-assembler subs\tx[0-9]+, x[0-9]+, x[0-9]+, lsl 3 scan-assembler-times subs\tx[0-9]+, x[0-9]+, x[0-9]+, sxtw 2

# No differences found in 3 common sum files

The patterns are fixing the regressing tests, so I have not added any new tests.
Regarding  removal of the old patterns based on "mults",  I am planning to do it as a separate work.

Is this OK for trunk ?


2015-05-19  Venkataramanan Kumar  <>

         * config/aarch64/
         (*adds_shift_imm_<mode>):  New pattern.
         (*subs_shift_imm_<mode>):  Likewise.
         (*adds_<optab><ALLX:mode>_shift_<GPI:mode>):  Likewise.
         (*subs_<optab><ALLX:mode>_shift_<GPI:mode>): Likewise.
         (*add_uxt<mode>_shift2): Likewise.
         (*add_uxtsi_shift2_uxtw): Likewise.
        (*sub_uxt<mode>_shift2): Likewise.
        (*sub_uxtsi_shift2_uxtw): Likewise.


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