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Re: [PATCH][AARCH64]Use mov for add with large immediate.


Hi Marcus,

On 01/05/15 11:19, Marcus Shawcroft wrote:
On 21 April 2015 at 17:10, Renlin Li <renlin.li@arm.com> wrote:
Hi all,

This is a simple patch to generate a move instruction to temporarily hold
the large immediate for a add instruction.

GCC regression test has been run using aarch64-none-elf toolchain. NO new
issues.

Okay for trunk?

Regards,
Renlin Li

gcc/ChangeLog:

2015-04-21  Renlin Li  <renlin.li@arm.com>

     * config/aarch64/aarch64.md (add<mode>3): Use mov when allowed.
A couple style nits:

        HOST_WIDE_INT imm = INTVAL (operands[2]);
-
-      if (imm < 0)

Don't remove the blank line between declarations and the first statement.

+      if (aarch64_move_imm (imm, <MODE>mode)
+  && can_create_pseudo_p ())
+      {

The indentation of { should conform to the gnu style guide.

It also  looks to me that  an unbroken line will fit within the 80
column limit, hence the break before && is unnecessary.

Thank you, Marcus. I have updated the patch accordingly, please check..

Regards,
Renlin Li


Cheers
/Marcus

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 429c5ba..d0ceafa 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1414,18 +1414,28 @@
   "
   if (! aarch64_plus_operand (operands[2], VOIDmode))
     {
-      rtx subtarget = ((optimize && can_create_pseudo_p ())
-		       ? gen_reg_rtx (<MODE>mode) : operands[0]);
       HOST_WIDE_INT imm = INTVAL (operands[2]);
 
-      if (imm < 0)
-	imm = -(-imm & ~0xfff);
+      if (aarch64_move_imm (imm, <MODE>mode) && can_create_pseudo_p ())
+        {
+	  rtx tmp = gen_reg_rtx (<MODE>mode);
+	  emit_move_insn (tmp, operands[2]);
+	  operands[2] = tmp;
+        }
       else
-        imm &= ~0xfff;
-
-      emit_insn (gen_add<mode>3 (subtarget, operands[1], GEN_INT (imm)));
-      operands[1] = subtarget;
-      operands[2] = GEN_INT (INTVAL (operands[2]) - imm);
+        {
+	  rtx subtarget = ((optimize && can_create_pseudo_p ())
+			   ? gen_reg_rtx (<MODE>mode) : operands[0]);
+
+	  if (imm < 0)
+	    imm = -(-imm & ~0xfff);
+	  else
+	    imm &= ~0xfff;
+
+	  emit_insn (gen_add<mode>3 (subtarget, operands[1], GEN_INT (imm)));
+	  operands[1] = subtarget;
+	  operands[2] = GEN_INT (INTVAL (operands[2]) - imm);
+        }
     }
   "
 )

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