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Re: [PATCH][AARCH64]Add ACLE 2.0 predefined macros: __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR
- From: Andrew Pinski <pinskia at gmail dot com>
- To: Renlin Li <renlin dot li at arm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, marcus Shawcroft <Marcus dot Shawcroft at arm dot com>, ramana Radhakrishnan <ramana dot radhakrishnan at arm dot com>
- Date: Tue, 28 Apr 2015 17:24:57 -0700
- Subject: Re: [PATCH][AARCH64]Add ACLE 2.0 predefined macros: __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR
- Authentication-results: sourceware.org; auth=none
- References: <54900732 dot 4010604 at arm dot com>
On Tue, Dec 16, 2014 at 2:19 AM, Renlin Li <email@example.com> wrote:
> Hi all,
> This is a simple patch to add another two ACLE 2.0 predefined macros into
> aarch64 backend.
> They are __ARM_ALIGN_MAX_PWR and __ARM_ALIGN_MAX_STACK_PWR. Currently, those
> two values are hard-wired to 16.
> The following clauses from ACLE 2.0 documentation indicate the meaning of
> those two macros:
> The macro __ARM_ALIGN_MAX_STACK_PWR indicates (as the exponent of a power of
> 2) the maximum available stack alignment.
> The macro __ARM_ALIGN_MAX_PWR indicates (as the exponent of a power of 2)
> the maximum available alignment of static data.
> aarch64-none-elf target is tested on on the model. No new regression.
> Is it Okay for trunk?
Have you tested these alignments? That is have we tested 65536
alignment for both stack and static data?
I suspect the stack alignment that is support is not 64k but much
smaller. And the supported static data alignment is much larger,
maybe 20 or more.
> Renlin Li
> 2014-12-16 Renlin Li <firstname.lastname@example.org>
> * config/aarch64/aarch64.h(TARGET_CPU_CPP_BUILTINS): Define
> and __ARM_ALIGN_MAX_STACK_PWR.