This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[PATCH, alpha]: Fix reload_out<mode>_aligned insn pattern


Hello!

gfortran.dg/char_length_15.f90 FAILs on non-BWX alpha due to invalid
propagation of memory address into reload_out<mode>_aligned insn
pattern.

We start with:

*** char_length_15.f90.228r.reload:

(insn 577 456 460 14 (parallel [
            (set (mem/c:QI (plus:DI (reg:DI 6 $6 [358])
                        (const_int 8 [0x8])) [0  S1 A32])
                (reg:QI 8 $8))
            (clobber (reg:SI 3 $3))
            (clobber (reg:SI 4 $4))
        ]) /space/homedirs/uros/gcc-svn/trunk/gcc/testsuite/gfortran.dg/char_length_15.f90:30
243 {reload_outqi_aligned}
     (nil))

Postreload pass propagates address involving clobbered reg $4:

*** char_length_15.f90.229r.postreload:

(insn 577 456 460 14 (parallel [
            (set (mem/c:QI (plus:DI (reg:DI 4 $4 [357])
                        (const_int 12 [0xc])) [0  S1 A32])
                (reg:QI 8 $8))
            (clobber (reg:SI 3 $3))
            (clobber (reg:SI 4 $4))
        ]) /space/homedirs/uros/gcc-svn/trunk/gcc/testsuite/gfortran.dg/char_length_15.f90:30
243 {reload_outqi_aligned}
     (nil))

And this pattern is split in a post-reload splitter to:

*** char_length_15.f90.231r.split2:

(insn 578 456 579 14 (set (reg:SI 3 $3)
        (mem/c:SI (plus:DI (reg:DI 4 $4 [357])
                (const_int 12 [0xc])) [0  S4 A32]))
/space/homedirs/uros/gcc-svn/trunk/gcc/testsuite/gfortran.dg/char_length_15.f90:30
229 {*movsi}
     (nil))
(insn 579 578 580 14 (set (reg:DI 3 $3)
        (and:DI (reg:DI 3 $3)
            (const_int -256 [0xffffffffffffff00])))
/space/homedirs/uros/gcc-svn/trunk/gcc/testsuite/gfortran.dg/char_length_15.f90:30
48 {anddi3}
     (nil))
(insn 580 579 581 14 (set (reg:DI 4 $4)
        (ashift:DI (zero_extend:DI (reg:QI 8 $8))
            (const_int 0 [0])))
/space/homedirs/uros/gcc-svn/trunk/gcc/testsuite/gfortran.dg/char_length_15.f90:30
86 {insbl_const}
     (nil))
(insn 581 580 582 14 (set (reg:DI 4 $4)
        (ior:DI (reg:DI 4 $4)
            (reg:DI 3 $3)))
/space/homedirs/uros/gcc-svn/trunk/gcc/testsuite/gfortran.dg/char_length_15.f90:30
58 {iordi3}
     (nil))
(insn 582 581 460 14 (set (mem/c:SI (plus:DI (reg:DI 4 $4 [357])
                (const_int 12 [0xc])) [0  S4 A32])
        (reg:SI 4 $4))
/space/homedirs/uros/gcc-svn/trunk/gcc/testsuite/gfortran.dg/char_length_15.f90:30
229 {*movsi}
     (nil))


(insn 582) uses the address that involves the register $4, clobbered
in (insn 580) and (insn 581).

Declaring operands 2 and 3 in reload_out<mode>_aligned insn pattern as
earlyclobber operands solves this issue.

2015-02-10  Uros Bizjak  <ubizjak@gmail.com>

    * config/alpha/alpha.md (reload_out<mode>_aligned): Make operands 2
    and 3 earlyclobber operands.

Patch was bootstrapped and regression tested on alpha-linux-gnu. Patch
was committed to mainline and will be backported to release branches.

Uros.

Attachment: a.diff.txt
Description: Text document


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]