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[Patch, moxie] Add -mmul.x option
- From: Anthony Green <green at moxielogic dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: Wed, 24 Dec 2014 08:17:51 -0500
- Subject: [Patch, moxie] Add -mmul.x option
- Authentication-results: sourceware.org; auth=none
I am committing the attached patch, which adds support for the mul.x and
umul.x instructions, which compute the high 32 bits of a 64-bit result
for a 32-bit multiply (signed and unsigned). These instructions are
enabled by default for moxiebox-* configurations.
This patch also updates the add, sub, mul, div and udiv instruction
names by removing the trailing ".l".
2014-12-24 Anthony Green <green@moxielogic.com>
* config/moxie/moxie.opt (mul.x): New option.
* doc/invoke.texi (Moxie Options): Document -mmul.x.
* config/moxie/moxie.md (addsi3, mulsi3, subsi3, divsi3, udivs3):
Remove trailing ".l" from add, mul, sub, div and udiv
instructions.
(<mul>si3_highpart, <mul>sidi3): Add mul.x & umul.x instruction
support (high 32-bit result of multiply).
* config/moxie/moxie.c (moxie_option_override): Force availability
of mul.x instructions for moxiebox target.
* config/moxie/moxiebox.h (TARGET_MOXIEBOX): Define.
Index: gcc/config/moxie/moxie.c
===================================================================
--- gcc/config/moxie/moxie.c (revision 219054)
+++ gcc/config/moxie/moxie.c (working copy)
@@ -249,13 +249,16 @@
}
-/* The TARGET_OPTION_OVERRIDE worker.
- All this curently does is set init_machine_status. */
+/* The TARGET_OPTION_OVERRIDE worker. */
static void
moxie_option_override (void)
{
/* Set the per-function-data initializer. */
init_machine_status = moxie_init_machine_status;
+
+#ifdef TARGET_MOXIEBOX
+ target_flags &= ~MASK_HAS_MULX;
+#endif
}
/* Compute the size of the local area and the size to be adjusted by the
Index: gcc/config/moxie/moxie.md
===================================================================
--- gcc/config/moxie/moxie.md (revision 219054)
+++ gcc/config/moxie/moxie.md (working copy)
@@ -50,7 +50,7 @@
"@
inc %0, %2
dec %0, -%2
- add.l %0, %2")
+ add %0, %2")
(define_insn "subsi3"
[(set (match_operand:SI 0 "register_operand" "=r,r")
@@ -60,7 +60,7 @@
""
"@
dec %0, %2
- sub.l %0, %2")
+ sub %0, %2")
(define_insn "mulsi3"
[(set (match_operand:SI 0 "register_operand" "=r")
@@ -68,15 +68,44 @@
(match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "register_operand" "r")))]
""
- "mul.l %0, %2")
+ "mul %0, %2")
+(define_code_iterator EXTEND [sign_extend zero_extend])
+(define_code_attr mul [(sign_extend "mul") (zero_extend "umul")])
+
+(define_insn "<mul>si3_highpart"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (truncate:SI
+ (lshiftrt:DI
+ (mult:DI (EXTEND:DI (match_operand:SI 1 "register_operand" "0"))
+ (EXTEND:DI (match_operand:SI 2 "register_operand" "r")))
+ (const_int 32))))]
+ "TARGET_HAS_MULX"
+ "<mul>.x\\t%0, %2")
+
+(define_expand "<mul>sidi3"
+ [(set (match_operand:DI 0 "register_operand" "")
+ (mult:DI (EXTEND:DI (match_operand:SI 1 "register_operand" "0"))
+ (EXTEND:DI (match_operand:SI 2 "register_operand" "r"))))]
+ "TARGET_HAS_MULX"
+{
+ rtx hi = gen_reg_rtx (SImode);
+ rtx lo = gen_reg_rtx (SImode);
+
+ emit_insn (gen_<mul>si3_highpart (hi, operands[1], operands[2]));
+ emit_insn (gen_mulsi3 (lo, operands[1], operands[2]));
+ emit_move_insn (gen_lowpart (SImode, operands[0]), lo);
+ emit_move_insn (gen_highpart (SImode, operands[0]), hi);
+ DONE;
+})
+
(define_insn "divsi3"
[(set (match_operand:SI 0 "register_operand" "=r")
(div:SI
(match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "register_operand" "r")))]
""
- "div.l %0, %2")
+ "div %0, %2")
(define_insn "udivsi3"
[(set (match_operand:SI 0 "register_operand" "=r")
@@ -84,7 +113,7 @@
(match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "register_operand" "r")))]
""
- "udiv.l %0, %2")
+ "udiv %0, %2")
(define_insn "modsi3"
[(set (match_operand:SI 0 "register_operand" "=r")
@@ -92,7 +121,7 @@
(match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "register_operand" "r")))]
""
- "mod.l %0, %2")
+ "mod %0, %2")
(define_insn "umodsi3"
[(set (match_operand:SI 0 "register_operand" "=r")
@@ -100,7 +129,7 @@
(match_operand:SI 1 "register_operand" "0")
(match_operand:SI 2 "register_operand" "r")))]
""
- "umod.l %0, %2")
+ "umod %0, %2")
;; -------------------------------------------------------------------------
;; Unary arithmetic instructions
Index: gcc/config/moxie/moxie.opt
===================================================================
--- gcc/config/moxie/moxie.opt (revision 219054)
+++ gcc/config/moxie/moxie.opt (working copy)
@@ -26,6 +26,10 @@
Target RejectNegative Report Mask(LITTLE_ENDIAN)
Generate little-endian code
+mmul.x
+Target Report Mask(HAS_MULX)
+Enable MUL.X and UMUL.X instructions
+
; Ignored by the compiler
mno-crt0
Target RejectNegative
Index: gcc/config/moxie/moxiebox.h
===================================================================
--- gcc/config/moxie/moxiebox.h (revision 219054)
+++ gcc/config/moxie/moxiebox.h (working copy)
@@ -45,3 +45,5 @@
#undef PTRDIFF_TYPE
#undef WCHAR_TYPE
#undef WCHAR_TYPE_SIZE
+
+#define TARGET_MOXIEBOX
Index: gcc/doc/invoke.texi
===================================================================
--- gcc/doc/invoke.texi (revision 219054)
+++ gcc/doc/invoke.texi (working copy)
@@ -843,7 +843,7 @@
-mno-crt0 -mrelax -mliw -msetlb}
@emph{Moxie Options}
-@gccoptlist{-meb -mel -mno-crt0}
+@gccoptlist{-meb -mel -mmul.x -mno-crt0}
@emph{MSP430 Options}
@gccoptlist{-msim -masm-hex -mmcu= -mcpu= -mlarge -msmall -mrelax @gol
@@ -18854,6 +18854,11 @@
@opindex mel
Generate little-endian code.
+@item -mmul.x
+@opindex mmul.x
+Generate mul.x and umul.x instructions. This is the default for
+@samp{moxiebox-*-*} configurations.
+
@item -mno-crt0
@opindex mno-crt0
Do not link in the C run-time initialization object file.