Re: [RFC PATCH 8/9] [SH] Add splitter to addsi3_compact

[Oleg Endo <oleg dot endo at t-online dot de>]

On Thu, 2014-12-18 at 10:04 +0900, Kaz Kojima wrote:
> This patch is discussed in PR55212
> 
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212#c65
> 
> and is to make LRA's register elimination work well on SH.
> The problem is SH has very limited add instructions only and expands
> rA := rB + N to (set rA (const_int N)) and (set rA (plus rA rB))
> instead of (set rA (plus rB (const_int N))).  It seems that the former
> combination isn't good for LRA's register elimination pass.  The patch
> adds splitter to addsi3_compact insn so that LRA can see the latter
> rtl.
> 
> --
> 	* config/sh/predicates.md (arith_or_int_operand): New predicate.
> 	* config/sh/sh.md (addsi3): Use arith_or_int_operand for operand 2.
> 	Return fail if operands[0] and operands[1] are overlap when
> 	operands[2] is integer constant.
> 	(*addsi3_compact): Make it define_insn_and_split which splits
> 	reg0 := reg1 + constant to reg0 = constant and reg0 := reg0 + reg1.

This triggered a warning about suggested parentheses around the &&
condition in *addsi3_compact.  I've committed the attached patch as
r218999.

Cheers,
Oleg

gcc/ChangeLog:
	PR target/55212
	* config/sh/sh.md (*addsi3_compact): Add parentheses around &&
	condition.  Add comments.

Index: gcc/config/sh/sh.md
===================================================================
--- gcc/config/sh/sh.md	(revision 218997)
+++ gcc/config/sh/sh.md	(working copy)
@@ -2056,14 +2056,20 @@
   [(set_attr "type" "arith_media")
    (set_attr "highpart" "ignore")])
 
+;; The *addsi3_compact is made an insn_and_split and accepts actually
+;; impossible constraints to make LRA's register elimination work well on SH.
+;; The problem is that LRA expects something like
+;;    (set rA (plus rB (const_int N)))
+;; to work.  We can do that, but we have to split out an additional reg-reg
+;; copy before the actual add insn.
 (define_insn_and_split "*addsi3_compact"
   [(set (match_operand:SI 0 "arith_reg_dest" "=r,&r")
 	(plus:SI (match_operand:SI 1 "arith_operand" "%0,r")
 		 (match_operand:SI 2 "arith_or_int_operand" "rI08,rn")))]
   "TARGET_SH1
-   && (rtx_equal_p (operands[0], operands[1])
-       && arith_operand (operands[2], SImode))
-      || ! reg_overlap_mentioned_p (operands[0], operands[1])"
+   && ((rtx_equal_p (operands[0], operands[1])
+        && arith_operand (operands[2], SImode))
+       || ! reg_overlap_mentioned_p (operands[0], operands[1]))"
   "@
 	add	%2,%0
 	#"