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Re: PATCH [2 of 7], rs6000, add support for scalar floating point in Altivec registers


When I did the original power7 work, I put the reload handlers into vector.md,
since they were only used for vector types.  Since they are now more general, I
am moving these insns from vector.md to rs6000.md.  Is this patch acceptable to
be checked in once the PowerPC boostraps again.

2014-11-11  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vector.md (VEC_R): Move secondary reload support
	insns to rs6000.md from vector.md.
	(reload_<VEC_R:mode>_<P:mptrsize>_store): Likewise.
	(reload_<VEC_R:mode>_<P:mptrsize>_load): Likewise.
	(vec_reload_and_plus_<mptrsize>): Likewise.

	* config/rs6000/rs6000.md (RELOAD): New mode iterator for all of
	the types that have secondary reload address support to load up a
	base register.
	(reload_<RELOAD:mode>_<P:mptrsize>_store): Move the reload
	handlers here from vector.md, and expand the types we generate
	reload handlers for.
	(reload_<RELOAD:mode>_<P:mptrsize>_load): Likewise.
	(vec_reload_and_plus_<mptrsize>): Likewise.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797

Attachment: gcc-power8.patch132c
Description: Text document


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