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Re: [PATCH i386 AVX512] [76/n] Extend int 2 float conversions.


Hello UroÅ,
On 09 Oct 18:05, Uros Bizjak wrote:
> On Thu, Oct 9, 2014 at 5:01 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
> > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> > index 7c34431..8a7853e 100644
> > --- a/gcc/config/i386/i386.c
> > +++ b/gcc/config/i386/i386.c
> > @@ -18811,6 +18811,19 @@ ix86_expand_vector_convert_uns_vsivsf (rtx target, rtx val)
> >    enum machine_mode fltmode = GET_MODE (target);
> >    rtx (*cvt) (rtx, rtx);
> 
> Please handle this directly in floatuns<sseintvecmodelower><mode>2
> expander. The V16SImode is already handled from there.
Done.

Bootstrapped.

gcc/
	* config/i386/sse.md
	(define_expand "floatuns<sseintvecmodelower><mode>2"): Extend to
	support AVX-512VL instructions.

Is it ok for main trunk?

--
Thanks, K

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 23f584a..a9da807 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -4016,6 +4016,14 @@
   if (<MODE>mode == V16SFmode)
     emit_insn (gen_ufloatv16siv16sf2 (operands[0], operands[1]));
   else
+    if (TARGET_AVX512VL)
+      {
+	if (<MODE>mode == V4SFmode)
+	  emit_insn (gen_ufloatv4siv4sf2 (operands[0], operands[1]));
+	else
+	  emit_insn (gen_ufloatv8siv8sf2 (operands[0], operands[1]));
+      }
+  else
     ix86_expand_vector_convert_uns_vsivsf (operands[0], operands[1]);
 
   DONE;


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