This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH, rs6000] Correct optimization of VSX extract-load for little endian


On Thu, Sep 4, 2014 at 12:07 AM, Bill Schmidt
<wschmidt@linux.vnet.ibm.com> wrote:
> Hi,
>
> The *vsx_extract_<mode>_load pattern performs a scalar load of memory
> when possible, rather than a vector load followed by an extract.  The
> assembly for the pattern always loads the 0th memory doubleword element,
> but the pattern match selects the 0th for big-endian and the 1st for
> little-endian, leading to wrong results for LE.  This patch changes the
> pattern match to look for the 0th element regardless of endianness.
>
> I ran across this when working on another patch, which provides more
> test coverage for this scenario and will be submitted shortly.  For this
> patch, I'm just correcting the now-failing vsx-extract-1.c test.
>
> Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
> regressions.  Ok for trunk?  (This should eventually be backported to
> 4.8 and 4.9 as well...)
>
> Thanks,
> Bill
>
>
> [gcc]
>
> 2014-09-03  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
>
>         * config/rs6000/vsx.md (*vsx_extract_<mode>_load): Always match
>         selection of 0th memory doubleword, regardless of endianness.
>
> [gcc/testsuite]
>
> 2014-09-03  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
>
>         * gcc.target/powerpc/vsx-extract-1.c:  Test 0th doubleword
>         regardless of endianness.

Okay.

Thanks, David


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]