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Re: [PATCH i386 AVX512] [3/n] Introduce `-mavx512vl' switch
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: Kirill Yukhin <kirill dot yukhin at gmail dot com>
- Cc: Jakub Jelinek <jakub at redhat dot com>, Richard Henderson <rth at redhat dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>, Dmitry Babokin <replyto-bd872b37 at plus dot google dot com>
- Date: Mon, 11 Aug 2014 08:59:34 +0200
- Subject: Re: [PATCH i386 AVX512] [3/n] Introduce `-mavx512vl' switch
- Authentication-results: sourceware.org; auth=none
- References: <20140808124057 dot GC45684 at msticlxl57 dot ims dot intel dot com>
On Fri, Aug 8, 2014 at 2:40 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
> Hello,
> This patch introduces `-mavx512vl' option to GCC
>
> Bootstrapped.
>
> gcc/
> * common/config/i386/i386-common.c
> (OPTION_MASK_ISA_AVX512VL_SET): Define.
> (OPTION_MASK_ISA_AVX512F_UNSET): Update.
> (ix86_handle_option): Handle OPT_mavx512vl.
> * config/i386/cpuid.h (bit_AVX512VL): Define.
> * config/i386/driver-i386.c (host_detect_local_cpu): Detect avx512vl,
> set -mavx512vl accordingly.
> * config/i386/i386-c.c (ix86_target_macros_internal): Handle
> OPTION_MASK_ISA_AVX512VL.
> * config/i386/i386.c (ix86_target_string): Handle -mavx512vl.
> (ix86_option_override_internal): Define PTA_AVX512VL, handle
> PTA_AVX512VL and OPTION_MASK_ISA_AVX512VL.
> (ix86_valid_target_attribute_inner_p): Handle OPT_mavx512vl.
> * config/i386/i386.h (TARGET_AVX512VL): Define.
> (TARGET_AVX512VL_P(x)): Ditto.
> * config/i386/i386.opt: Add mavx512vl.
>
> Is it ok for main trunk?
>
> diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c
> index a2e94d5..da47e64 100644
> --- a/gcc/common/config/i386/i386-common.c
> +++ b/gcc/common/config/i386/i386-common.c
> @@ -69,6 +69,8 @@ along with GCC; see the file COPYING3. If not see
> (OPTION_MASK_ISA_AVX512DQ | OPTION_MASK_ISA_AVX512F_SET)
> #define OPTION_MASK_ISA_AVX512BW_SET \
> (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512F_SET)
> +#define OPTION_MASK_ISA_AVX512VL_SET \
> + (OPTION_MASK_ISA_AVX512VL | OPTION_MASK_ISA_AVX512F_SET)
> #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
> #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
> #define OPTION_MASK_ISA_RDSEED_SET OPTION_MASK_ISA_RDSEED
> @@ -156,7 +158,9 @@ along with GCC; see the file COPYING3. If not see
> (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX512F_UNSET)
> #define OPTION_MASK_ISA_AVX512F_UNSET \
> (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX512CD_UNSET \
> - | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET)
> + | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET \
> + | OPTION_MASK_ISA_AVX512DQ_UNSET | OPTION_MASK_ISA_AVX512BW_UNSET \
> + | OPTION_MASK_ISA_AVX512VL_UNSET)
The line above should be part of patches 1/n and 2/n.
OK with this change.
Thanks,
Uros.