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Re: [PINGv3][PATCH] Fix for PR 61561


Sending        gcc/ChangeLog
Sending        gcc/config/arm/thumb1.md
Transmitting file data ..
Committed revision 213710.

P.S. Sorry for inconvenience.

On 08/07/2014 01:02 PM, Marat Zakirov wrote:
Sorry ;( Will test&fix it.

On 08/07/2014 12:50 PM, Richard Earnshaw wrote:
On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
Similarly for the movqi pattern.

You haven't updated the thumb1 QImode pattern in the same way.

R.

On 07/08/14 09:10, Marat Zakirov wrote:
--Marat
On 08/07/2014 12:00 PM, Ramana Radhakrishnan wrote:
On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov <m.zakirov@samsung.com> wrote:
Thank you.

$ svn commit
Sending        gcc/ChangeLog
Sending        gcc/config/arm/thumb1.md
Sending gcc/config/arm/thumb2.md./gcc/config/arm/thumb1.md
Transmitting file data ...
Committed revision 213695.

P.S.

Minor nit was reg. tested.
Another minor nit - please send the patch you committed to be archived
on the mailing list.

regards
Ramana

On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
On 06/08/14 15:14, Ramana Radhakrishnan wrote:
This is OK thanks.


Ramana

Hmm, minor nit.

    (define_insn "*thumb1_movhi_insn"
[(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
-       (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
+       (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]

This would be better expressed as:

[(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
           (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]

that is, to use the 4th alternative. That's because the use of SP in
these operations does not clobber the flags.

Similarly for the movqi pattern.

R.



thumb2.diff


gcc/ChangeLog:

2014-08-07  Marat Zakirov  <m.zakirov@samsung.com>

* config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
    (*thumb1_movqi_insn): Likewise.
    * config/arm/thumb2.md (*thumb2_movhi_insn): Likewise.

diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
index cd1adf4..fed741e 100644
--- a/gcc/config/arm/thumb1.md
+++ b/gcc/config/arm/thumb1.md
@@ -707,8 +707,8 @@
  )
    (define_insn "*thumb1_movhi_insn"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
-    (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
+    (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
    "TARGET_THUMB1
     && (   register_operand (operands[0], HImode)
         || register_operand (operands[1], HImode))"
@@ -762,7 +762,7 @@
    (define_insn "*thumb1_movqi_insn"
[(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
-    (match_operand:QI 1 "general_operand"      "l, m,l,*h,*r,I"))]
+    (match_operand:QI 1 "general_operand"      "lk, m,l,*h,*r,I"))]
    "TARGET_THUMB1
     && (   register_operand (operands[0], QImode)
         || register_operand (operands[1], QImode))"
diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index 029a679..983b59d 100644
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -318,7 +318,7 @@
  ;; of the messiness associated with the ARM patterns.
  (define_insn "*thumb2_movhi_insn"
    [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r")
-    (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))]
+    (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))]
    "TARGET_THUMB2
    && (register_operand (operands[0], HImode)
       || register_operand (operands[1], HImode))"




gcc/ChangeLog:

2014-08-07  Marat Zakirov  <m.zakirov@samsung.com>

	* config/arm/thumb1.md (*thumb1_movqi_insn): Copy of thumb1_movhi_insn.

--- gcc/config/arm/thumb1.md	(revision 213695)
+++ gcc/config/arm/thumb1.md	(working copy)
@@ -761,8 +761,8 @@
 )
 
 (define_insn "*thumb1_movqi_insn"
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
-	(match_operand:QI 1 "general_operand"      "lk, m,l,*h,*r,I"))]
+  [(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
+	(match_operand:QI 1 "general_operand"       "l,m,l,k*h,*r,I"))]
   "TARGET_THUMB1
    && (   register_operand (operands[0], QImode)
        || register_operand (operands[1], QImode))"

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