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Re: [PINGv3][PATCH] Fix for PR 61561
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Marat Zakirov <m dot zakirov at samsung dot com>
- Cc: Ramana Radhakrishnan <Ramana dot Radhakrishnan at arm dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Kyrylo Tkachov <Kyrylo dot Tkachov at arm dot com>, Christophe Lyon <christophe dot lyon at linaro dot org>, Slava Garbuzov <v dot garbuzov at samsung dot com>, Yury Gribov <y dot gribov at samsung dot com>
- Date: Thu, 07 Aug 2014 09:50:37 +0100
- Subject: Re: [PINGv3][PATCH] Fix for PR 61561
- Authentication-results: sourceware.org; auth=none
- References: <53BE8EA4 dot 7080803 at arm dot com> <53BFA9A9 dot 4090209 at samsung dot com> <CAKdteOZCDuQS4+jH1wQH4U7g5Ew1BYmtDs65xpw3c2kJ9Ek2Pw at mail dot gmail dot com> <53C64468 dot 9000506 at samsung dot com> <53C646BB dot 6020905 at arm dot com> <53C7B202 dot 3070401 at samsung dot com> <53CFB98D dot 50005 at samsung dot com> <53D8EB65 dot 7040303 at samsung dot com> <53E237CE dot 7050702 at samsung dot com> <53E23832 dot 4070707 at arm dot com> <53E23F38 dot 5020400 at arm dot com> <53E32C99 dot 9020202 at samsung dot com> <CAJA7tRZJCFk4cikpDPPT1y94=XYKzhgqMt4mGZxw13CXUooA5Q at mail dot gmail dot com> <53E3348E dot 5040202 at samsung dot com>
>>> On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
>>>> Similarly for the movqi pattern.
You haven't updated the thumb1 QImode pattern in the same way.
R.
On 07/08/14 09:10, Marat Zakirov wrote:
> --Marat
> On 08/07/2014 12:00 PM, Ramana Radhakrishnan wrote:
>> On Thu, Aug 7, 2014 at 8:36 AM, Marat Zakirov <m.zakirov@samsung.com> wrote:
>>> Thank you.
>>>
>>> $ svn commit
>>> Sending gcc/ChangeLog
>>> Sending gcc/config/arm/thumb1.md
>>> Sending gcc/config/arm/thumb2.md
>>> Transmitting file data ...
>>> Committed revision 213695.
>>>
>>> P.S.
>>>
>>> Minor nit was reg. tested.
>> Another minor nit - please send the patch you committed to be archived
>> on the mailing list.
>>
>> regards
>> Ramana
>>
>>>
>>> On 08/06/2014 06:44 PM, Richard Earnshaw wrote:
>>>> On 06/08/14 15:14, Ramana Radhakrishnan wrote:
>>>>>
>>>>> This is OK thanks.
>>>>>
>>>>>
>>>>> Ramana
>>>>>
>>>> Hmm, minor nit.
>>>>
>>>> (define_insn "*thumb1_movhi_insn"
>>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
>>>> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
>>>> + (match_operand:HI 1 "general_operand" "lk,m,l,*h,*r,I"))]
>>>>
>>>> This would be better expressed as:
>>>>
>>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
>>>> (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
>>>>
>>>> that is, to use the 4th alternative. That's because the use of SP in
>>>> these operations does not clobber the flags.
>>>>
>>>> Similarly for the movqi pattern.
>>>>
>>>> R.
>>>>
>>>>
>>>>
>>>> thumb2.diff
>>>>
>>>>
>>>> gcc/ChangeLog:
>>>>
>>>> 2014-08-07 Marat Zakirov <m.zakirov@samsung.com>
>>>>
>>>> * config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
>>>> (*thumb1_movqi_insn): Likewise.
>>>> * config/arm/thumb2.md (*thumb2_movhi_insn): Likewise.
>>>>
>>>> diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
>>>> index cd1adf4..fed741e 100644
>>>> --- a/gcc/config/arm/thumb1.md
>>>> +++ b/gcc/config/arm/thumb1.md
>>>> @@ -707,8 +707,8 @@
>>>> )
>>>>
>>>> (define_insn "*thumb1_movhi_insn"
>>>> - [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
>>>> - (match_operand:HI 1 "general_operand" "l,m,l,*h,*r,I"))]
>>>> + [(set (match_operand:HI 0 "nonimmediate_operand" "=l,l,m,l*r,*h,l")
>>>> + (match_operand:HI 1 "general_operand" "l,m,l,k*h,*r,I"))]
>>>> "TARGET_THUMB1
>>>> && ( register_operand (operands[0], HImode)
>>>> || register_operand (operands[1], HImode))"
>>>> @@ -762,7 +762,7 @@
>>>>
>>>> (define_insn "*thumb1_movqi_insn"
>>>> [(set (match_operand:QI 0 "nonimmediate_operand" "=l,l,m,*r,*h,l")
>>>> - (match_operand:QI 1 "general_operand" "l, m,l,*h,*r,I"))]
>>>> + (match_operand:QI 1 "general_operand" "lk, m,l,*h,*r,I"))]
>>>> "TARGET_THUMB1
>>>> && ( register_operand (operands[0], QImode)
>>>> || register_operand (operands[1], QImode))"
>>>> diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
>>>> index 029a679..983b59d 100644
>>>> --- a/gcc/config/arm/thumb2.md
>>>> +++ b/gcc/config/arm/thumb2.md
>>>> @@ -318,7 +318,7 @@
>>>> ;; of the messiness associated with the ARM patterns.
>>>> (define_insn "*thumb2_movhi_insn"
>>>> [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,l,r,m,r")
>>>> - (match_operand:HI 1 "general_operand" "r,I,Py,n,r,m"))]
>>>> + (match_operand:HI 1 "general_operand" "rk,I,Py,n,r,m"))]
>>>> "TARGET_THUMB2
>>>> && (register_operand (operands[0], HImode)
>>>> || register_operand (operands[1], HImode))"