[PATCH][AArch64] Fix types for vqdmlals_lane_s32 and vqdmlsls_lane_s32 intrinsics

[Kyrill Tkachov <kyrylo dot tkachov at arm dot com>]

Hi all,

Now that uint64x1_t and uint64_t are not interchangeable these 
intrinsics have an incorrect type. The reason is that these intrinsics 
should have had the scalar type for some of their arguments and results 
according to the NEON intrinsics spec.

This patch fixes that and updates the relevant tests.

Tested on aarch64-none-elf and bootstrapped on aarch64-linux.

Ok for trunk?

2014-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

    * config/aarch64/arm_neon.h (vqdmlals_lane_s32): Use scalar types
    rather than singleton vectors.
    (vqdmlsls_lane_s32): Likewise.

2014-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

    * gcc.target/aarch64/scalar_intrinsics.c (test_vqdmlals_lane_s32):
    Fix types.
    (test_vqdmlsls_lane_s32): Likewise.
    * gcc.target/aarch64/simd/vqdmlals_lane_s32.c: Likewise.
    * gcc.target/aarch64/simd/vqdmlsls_lane_s32.c: Likewise.

commit 4ad448d1d1d6f2c3376a04ab29b7d719870c932c
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date:   Thu Jun 26 10:34:04 2014 +0100

    [AArch64] Fix vqdmlsls_lane_s32 and vqdmlals_lane_s32 types

diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index b466b0e..7807181 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -19453,11 +19453,10 @@ vqdmlals_s32 (int64_t __a, int32x1_t __b, int32x1_t __c)
   return __builtin_aarch64_sqdmlalsi (__a, __b, __c);
 }
 
-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
-vqdmlals_lane_s32 (int64x1_t __a, int32x1_t __b, int32x2_t __c, const int __d)
+__extension__ static __inline int64_t __attribute__ ((__always_inline__))
+vqdmlals_lane_s32 (int64_t __a, int32_t __b, int32x2_t __c, const int __d)
 {
-  return (int64x1_t)
-      {__builtin_aarch64_sqdmlal_lanesi (__a[0], __b, __c, __d)};
+  return __builtin_aarch64_sqdmlal_lanesi (__a, __b, __c, __d);
 }
 
 __extension__ static __inline int64_t __attribute__ ((__always_inline__))
@@ -19592,10 +19591,10 @@ vqdmlsls_s32 (int64_t __a, int32x1_t __b, int32x1_t __c)
   return __builtin_aarch64_sqdmlslsi (__a, __b, __c);
 }
 
-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
-vqdmlsls_lane_s32 (int64x1_t __a, int32x1_t __b, int32x2_t __c, const int __d)
+__extension__ static __inline int64_t __attribute__ ((__always_inline__))
+vqdmlsls_lane_s32 (int64_t __a, int32_t __b, int32x2_t __c, const int __d)
 {
-  return (int64x1_t) {__builtin_aarch64_sqdmlsl_lanesi (__a[0], __b, __c, __d)};
+  return __builtin_aarch64_sqdmlsl_lanesi (__a, __b, __c, __d);
 }
 
 __extension__ static __inline int64_t __attribute__ ((__always_inline__))
diff --git a/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c b/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c
index 624348e..afdbf01 100644
--- a/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c
+++ b/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c
@@ -390,8 +390,8 @@ test_vqdmlals_s32 (int64_t a, int32x1_t b, int32x1_t c)
 
 /* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
 
-int64x1_t
-test_vqdmlals_lane_s32 (int64x1_t a, int32x1_t b, int32x2_t c)
+int64_t
+test_vqdmlals_lane_s32 (int64_t a, int32_t b, int32x2_t c)
 {
   return vqdmlals_lane_s32 (a, b, c, 1);
 }
@@ -422,8 +422,8 @@ test_vqdmlsls_s32 (int64_t a, int32x1_t b, int32x1_t c)
 
 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
 
-int64x1_t
-test_vqdmlsls_lane_s32 (int64x1_t a, int32x1_t b, int32x2_t c)
+int64_t
+test_vqdmlsls_lane_s32 (int64_t a, int32_t b, int32x2_t c)
 {
   return vqdmlsls_lane_s32 (a, b, c, 1);
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32.c
index ef94e95..38352c5 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32.c
@@ -5,8 +5,8 @@
 
 #include "arm_neon.h"
 
-int64x1_t
-t_vqdmlals_lane_s32 (int64x1_t a, int32x1_t b, int32x2_t c)
+int64_t
+t_vqdmlals_lane_s32 (int64_t a, int32_t b, int32x2_t c)
 {
   return vqdmlals_lane_s32 (a, b, c, 0);
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32.c
index 9e351bc..3c60898 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32.c
@@ -5,8 +5,8 @@
 
 #include "arm_neon.h"
 
-int64x1_t
-t_vqdmlsls_lane_s32 (int64x1_t a, int32x1_t b, int32x2_t c)
+int64_t
+t_vqdmlsls_lane_s32 (int64_t a, int32_t b, int32x2_t c)
 {
   return vqdmlsls_lane_s32 (a, b, c, 0);
 }