This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

RE: [RFC: Patch, PR 60102] [4.9/4.10 Regression] powerpc fp-bit ices at dwf_regno


Jakub,

> On Fri, Aug 01, 2014 at 06:03:56PM +0000, rohitarulraj@freescale.com wrote:
> > 	PR target/60102
> 
> --- libgcc/config/rs6000/linux-unwind.h (revision 213110)
> +++ libgcc/config/rs6000/linux-unwind.h (working copy)
> @@ -274,8 +274,8 @@ ppc_fallback_frame_state (struct _Unwind
>  #ifdef __SPE__
>    for (i = 14; i < 32; i++)
>      {
> -      fs->regs.reg[i + FIRST_PSEUDO_REGISTER - 1].how = REG_SAVED_OFFSET;
> -      fs->regs.reg[i + FIRST_PSEUDO_REGISTER - 1].loc.offset
> +      fs->regs.reg[i + FIRST_SPE_HIGH_REGNO - 4].how = REG_SAVED_OFFSET;
> +      fs->regs.reg[i + FIRST_SPE_HIGH_REGNO - 4].loc.offset
>         = (long) &regs->vregs - new_cfa + 4 * i;
>      }
>  #endif
> 
> is a different index, previously i + 116, newly i + 113, is that intentional?
> 

Yes, it is intentional.
This part of code wasn't updated after the introduction of three HTM registers.

Regards,
Rohit


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]