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Re: [RFC: Patch, PR 60102] [4.9/4.10 Regression] powerpc fp-bit ices at dwf_regno
- From: "Ulrich Weigand" <uweigand at de dot ibm dot com>
- To: rohitarulraj at freescale dot com
- Cc: gcc-patches at gcc dot gnu dot org (gcc-patches at gcc dot gnu dot org), edmar at freescale dot com (Edmar Wienskoski), dje dot gcc at gmail dot com (dje dot gcc at gmail dot com), amodra at gmail dot com (Alan Modra), jakub at redhat dot com (Jakub Jelinek)
- Date: Fri, 1 Aug 2014 16:28:57 +0200 (CEST)
- Subject: Re: [RFC: Patch, PR 60102] [4.9/4.10 Regression] powerpc fp-bit ices at dwf_regno
- Authentication-results: sourceware.org; auth=none
Rohit,
> #define DWARF_REG_TO_UNWIND_COLUMN(r) \
>- ((r) > 1200 ? ((r) - 1200 + (DWARF_FRAME_REGISTERS - 32)) : (r))
>+ ((r) >= 1200 ? ((r) - 1200 + (DWARF_FRAME_REGISTERS - 32)) : (r))
OK, makes sense.
> /* Use gcc hard register numbering for eh_frame. */
>-#define DWARF_FRAME_REGNUM(REGNO) (REGNO)
>+#define DWARF_FRAME_REGNUM(REGNO) \
>+ ((REGNO) >= FIRST_SPE_HIGH_REGNO ? ((REGNO) - FIRST_SPE_HIGH_REGNO + 1200) : (REGNO))
Any reason for not using SPE_HIGH_REGNO_P here, just in case we
do get other hard registers at some point?
Otherwise this now looks good to me. (Of course, I cannot
approve the patch myself.)
Thanks,
Ulrich
--
Dr. Ulrich Weigand
GNU/Linux compilers and toolchain
Ulrich.Weigand@de.ibm.com