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Re: [PATCH, 4 of 5], Add suport for PowerPC IEEE 128-bit floating point


The patches are the PowerPC specific patches to gcc to enable IEEE 128-bit
floating point.

2014-07-15  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* doc/invoke.texi (-mfloat128-vsx): Document new PowerPC switches
	to enable IEEE 128-bit floating point.
	(-mfloat128-ref): Likewise.
	* doc/extend.texi (Floating Types): Document use of __float128 on
	PowerPC systems.

	* config/rs6000/rs6000-protos.h (rs6000_expand_float128_convert):
	Add declaration.

	* config/rs6000/rs6000.c (TARGET_C_MODE_FOR_SUFFIX): Add support
	for using 'q' or 'Q' as the suffix for IEEE 128-bit floating
	point.
	(rs6000_c_mode_for_suffix): Likewise.
	(scalar_float_not_ieee128_p): Helper function to return true if
	normal scalar floating point, but not IEEE 128-bit floating
	point.
	(rs6000_hard_regno_nregs_internal): Add support for IEEE 128-bit
	floating point that can occupy a single vector register, instead
	of 2 scalar registers.
	(rs6000_debug_reg_global): Add debugging for IEEE 128-bit floating
	point support.
	(rs6000_init_hard_regno_mode_ok): Set up tables when IEEE 128-bit
	floating point can occupy a single vector register to use vector
	addressing.  Add reload helper functions.
	(rs6000_option_override_internal): Add support for -mfloat128-vsx
	and -mfloat128-ref options.
	(invalid_e500_subreg): Skip IEEE 128-bit floating point from being
	a subreg, like other floating point types.
	(reg_offset_addressing_ok_p): Add support for IEEE 128-bit
	floating point types going in a vector register.
	(rs6000_legitimate_offset_address_p): Likewise.
	(rs6000_legitimize_address): Likewise.
	(rs6000_legitimize_reload_address): Likewise.
	(rs6000_legitimate_address_p): Likewise.
	(rs6000_emit_le_vsx_load): On little endian VSX systems, make sure
	IEEE 128-bit floating point types are properly swapped.
	(rs6000_emit_le_vsx_store): Likewise.
	(rs6000_emit_move): Update moving IBM 128-bit floating point
	constants to use new macro framework.
	(force_const_mem): Handle IEEE 128-bit floating point.
	(rs6000_member_type_forces_blk): Likewise.
	(rs6000_discover_homogeneous_aggregate): Likewise.
	(rs6000_return_in_memory): If -mfloat128-vsx, return IEEE
	128-bit floating point in vector registers, otherwise caller must
	pass an address to store the result.
	(init_cumulative_args): Record whether the function is a library
	function or not.  IEEE 128-bit floating point is is not passed
	like normal scalar floating point.
	(function_arg_boundary): Add support for IEEE 128-bit floating
	point, passing/returning the values either in vector registers, or
	by passing a 128-bit space by reference.  IEEE 128-bit library
	functions are assumed to have a prototype, so the arguments are
	not needed in the parameter save area.
	(rs6000_function_arg_advance_1): Likewise.
	(rs6000_function_arg): Likewise.
	(rs6000_arg_partial_bytes): Likewise.
	(rs6000_pass_by_refernece): Likewise.
	(rs6000_gimplify_va_arg): Likewise.
	(rs6000_init_builtins): Initialize IEEE 128-bit floating point
	type.  Add support for __float128 keyword.
	(rs6000_init_funcs): Split this into 2 sub-functions, one to setup
	for IEEE 128-bit floating point, and the other to set up for IBM
	floating point.
	(init_float128_ibm): Likewise.
	(init_float128_ieee): Likewise.
	(rs6000_cannot_change_mode_class): Add support for IEEE 128-bit
	floating point.
	(rs6000_output_move_128bit): If an error is reached, use
	fatal_insn to print the SET insn all of the time, instead of when
	-mdebug=addr is used.
	(print_operand): Update %y to use IEEE 128-bit floating point
	macros.
	(rs6000_generate_compare): Add support for IEEE 128-bit floating
	point comparisons.
	(rs6000_expand_float128_convert): New helper function called from
	rtl expanders to generate the appropriate conversion to/from IEEE
	128-bit floating point.
	(rs6000_split_multireg_move): Use IEEE 128-bit floating point
	infrastructure macros.
	(spe_func_has_64bit_regs_p): Likewise.
	(rs6000_output_function_epilogue): Add IEEE 128-bit floating point
	support.
	(output_toc): Likewise.
	(rs6000_mangle_type): Likewise.
	(rs6000_register_move_cost): Likewise.
	(rs6000_function_value): Likewise.
	(rs6000_libcall_value): Likewise.
	(rs6000_scalar_mode_supported_p): Enable KFmode if -mfloat128-vsx
	or -mfloat128-ref.
	(rs6000_vector_mode_supported_p): There is no vector form of IEEE
	128-bit floating point.
	(rs6000_opt_masks): Add support for -mfloat128-vsx and
	-mfloat128-ref.

	* config/rs6000/vector.md (VEC_L): Add KFmode (IEEE 128-bit
	floating point) to vector mode iterators.
	(VEC_M): Likewise.
	(VEC_N): Likewise.
	(VEC_R): Likewise.
	(mov<mode>, VEC_M iterator): Add support for IEEE 128-bit floating
	point constants, calling easy_fp_convert instead of
	easy_vector_convert.

	* config/rs6000/predicates.md (int_reg_operand_not_pseudo): New
	predicate for splitters to only split 128-bit types when the value
	is in a hard GPR register.
	(easy_fp_constant): Add IEEE 128-bit floating point support.
	(easy_vector_constant): Call easy_fp_constant for scalar IEEE
	128-bit floating point.

	* config/rs6000/rs6000-modes.def (KFmode): New type for IEEE
	128-bit floating point support.

	* config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Set
	-mfloat128-vsx on by default.
	(POWERPC_MASKS): Add -mfloat128-vsx and -mfloat128-ref masks.
	(power7 cpu): Set -mfloat128-vsx on by default.

	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): If
	-mfloat128-vsx or -mfloat128-ref, define the appropriate macros.
	(rs6000_cpu_cpp_builtins): Define macros to identify the long
	double format.

	* config/rs6000/rs6000.opt (-mfloat128-vsx): New switches to
	enable/disable IEEE 128-bit floating point.
	(-mfloat128-ref): Likewise.

	* config/rs6000/vsx.md (VSX_L): Add KFmode/TFmode, based on the
	float128 switches.
	(VSX_M): Likewise.
	(VSX_M2): Likewise.
	(VSX_F128): New iterator for 128-bit scalar types that use vector
	registers.
	(VSm): Add IEEE 128-bit support to mode attributes.
	(VSs): Likewise.
	(VSr): Likewise.
	(VSv): Likewise.
	(vsx_le_perm_load_<mode>, VSX_F128 iterator): New insn for 128-bit
	scalars, casting the mode to V2DImode so vec_select can be used to
	create the xxpermdi instruction.
	(vsx_le_perm_store_<mode>, VSX_F128 iterator): Likewise.
	(IEEE 128-bit splitters): Add splitters for IEEE 128-bit floating
	point in vector registers.

	* config/rs6000/rs6000.h (TARGET_FLOAT128): New macro, true if
	either -mfloat128-vsx or -mfloat128-ref.
	(IEEE_128BIT_P): New macros to identify IEEE and IBM 128-bit
	floating point modes.
	(IBM_128BIT_P): Likewise.
	(FLOAT128_VECTOR_P): New macros to identify 128-bit floating point
	types that either use a single vector register, or a pair of
	scalar floating point registers.
	(FLOAT128_2REG_P): Likewise.
	(MASK_FLOAT128_VSX): Shorter IEEE 128-bit floating point option
	masks.
	(MASK_FLOAT128_REF): Likewise.
	(SLOW_UNALIGNED_ACCESS): Add support for IEEE 128-bit floating
	point modes.
	(HARD_REGNO_CALLER_SAVE_MODE): Likewise.
	(HARD_REGNO_CALL_PART_CLOBBERED): Likewise.
	(VSX_VECTOR_MODE): Likewise.
	(ALTIVEC_VECTOR_MODE): Likewise.
	(MODES_TIEABLE_P): Move tests for vector modes above scalar
	floating point modes, so that IEEE 128-bit floating point that
	goes in a VSX register only ties with other vector types.
	(struct rs6000_args): Add libcall field.
	(enum rs6000_builtin_type_index): Add IEEE 128-bit floating
	point.
	(ieee128_float_type_node): Likewise.

	* config/rs6000/altivec.md (VM): Add KFmode/TFmode to vector mode
	iterators.
	(VM2): Likewise.
	(altivec_high_bit): New function to instantiate vector register
	with high bit set (i.e. -0.0 for IEEE 128-bit floating point).

	* config/rs6000/rs6000.md (FP): Add IEEE 128-bit floating point
	support.
	(FMOVE128): Likewise.
	(FMOVE128_FPR): New mode iterator for 128-bit types that take 2
	floating point registers.
	(FMOVE128_GPR): Add KFmode.
	(FMOVE128_VSX): New iterator for scalar types in VSX registers.
	(FLOAT128_SFDFTF): New mode iterator for IEEE 128-bit floating
	point conversions.
	(TFKF): New mode iterator for 128-bit scalar floating point
	types.
	(mov<mode>_64bit_dm): Add support for IEEE 128-bit floating
	point.
	(mov<mode>_32bit): Likewise.
	(mov<mode>_softfloat): Likewise.
	(extenddftf2_internal): Add support if long double is IEEE 128-bit
	floating point.
	(trunctfdf2): Likewise.
	(trunctfdf2_internal1): Likewise.
	(fix_trunctfsi2): Likewise.
	(fix_trunctfdi2): Likewise.
	(funcs_trunctf<mode>2): Likewise.
	(floatditf2): Likewise.
	(floatuns<mode>tf2): Likewise
	(negtf2): Likewise.
	(negtf2_internal): Likewise.
	(abstf2): Likewise.
	(abs<mode>2, TKFK iterator): Likewise.
	(ieee_128bit_vsx_neg<mode>2): New insns for IEEE 128-bit floating
	point support.
	(ieee_128bit_vsx_neg<mode>2_internal): Likewise.
	(ieee_128bit_vsx_abs<mode>2): Likewise.
	(ieee_128bit_vsx_abs<mode>2_internal): Likewise.
	(ieee_128bit_vsx_nabs<mode>2): Likewise.
	(ieee_128bit_vsx_nabs<mode>2_internal): Likewise.
	(extend<mode>kf2): Likewise.
	(trunckf<mode>2): Likewise.
	(fix_trunckf<mode>2): Likewise.
	(fixuns_trunckf<mode>2): Likewise.
	(float<mode>kf2): Likewise.
	(floatuns<mode>kf2): Likewise.
	(unpack<mode>, FP128_64 iterator): Limit unpacking to when the
	mode takes two scalar registers.
	(unpack<mode>_dm, FP128_64 iterator): Likewise.
	(pack<mode>, FP128_64 iterator): Likewise.
	(unpackv1ti): Delete V1TImode pack/unpack, replace with modes that
	handle V1TImode, KFmode, and TFmode.
	(unpack<mode>): Likewise.
	(packv1ti): Likewise.
	(pack<mode>): Likewise.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797

Attachment: gcc-power8.patch115f
Description: Text document


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