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Re: [PATCH, i386] Add prefixes avoidance tuning for silvermont target
- From: Ilya Enkovich <enkovich dot gnu at gmail dot com>
- To: Andi Kleen <andi at firstfloor dot org>
- Cc: gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Thu, 3 Jul 2014 14:49:10 +0400
- Subject: Re: [PATCH, i386] Add prefixes avoidance tuning for silvermont target
- Authentication-results: sourceware.org; auth=none
- References: <20140702103536 dot GA1827 at msticlxl57 dot ims dot intel dot com> <87r423u3y2 dot fsf at tassilo dot jf dot intel dot com>
2014-07-02 20:21 GMT+04:00 Andi Kleen <andi@firstfloor.org>:
> Ilya Enkovich <enkovich.gnu@gmail.com> writes:
>
>> Silvermont processors have penalty for instructions having 4+ bytes of
>> prefixes (including escape bytes in opcode). This situation happens
>> when REX prefix is used in SSE4 instructions. This patch tries to
>> avoid such situation by preferring xmm0-xmm7 usage over xmm8-xmm15 in
>> those instructions. I achieved it by adding new tuning flag and new
>> alternatives affected by tuning.
>
> Why make it a tuning flag? Shouldn't this help unconditionally for code
> size everywhere? Or is there some drawback?
There is already a higher priority for registers not requiring REX.
My patch affects cases when compiler has to use xmm8-15 and it just
tries to say LRA to assign them for non SSE4 instructions. I doubt it
would have some use for other targets than Silvermont.
Ilya
>
> -Andi
>
> --
> ak@linux.intel.com -- Speaking for myself only