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Re: [PATCH, i386] Add prefixes avoidance tuning for silvermont target
- From: Jakub Jelinek <jakub at redhat dot com>
- To: Andi Kleen <andi at firstfloor dot org>
- Cc: Ilya Enkovich <enkovich dot gnu at gmail dot com>, gcc-patches at gcc dot gnu dot org
- Date: Wed, 2 Jul 2014 18:27:00 +0200
- Subject: Re: [PATCH, i386] Add prefixes avoidance tuning for silvermont target
- Authentication-results: sourceware.org; auth=none
- References: <20140702103536 dot GA1827 at msticlxl57 dot ims dot intel dot com> <87r423u3y2 dot fsf at tassilo dot jf dot intel dot com>
- Reply-to: Jakub Jelinek <jakub at redhat dot com>
On Wed, Jul 02, 2014 at 09:21:25AM -0700, Andi Kleen wrote:
> Ilya Enkovich <email@example.com> writes:
> > Silvermont processors have penalty for instructions having 4+ bytes of
> > prefixes (including escape bytes in opcode). This situation happens
> > when REX prefix is used in SSE4 instructions. This patch tries to
> > avoid such situation by preferring xmm0-xmm7 usage over xmm8-xmm15 in
> > those instructions. I achieved it by adding new tuning flag and new
> > alternatives affected by tuning.
> Why make it a tuning flag? Shouldn't this help unconditionally for code
> size everywhere? Or is there some drawback?
I don't think it will make code smaller, if you already have some value in
xmm8..xmm15 register, then by not allowing those registers directly on SSE4
insns just means it reloading and larger code.
BTW, is that change needed also when emitting AVX insns instead of SSE4?