This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH] Fix up -march=native handling under KVM (PR target/61570)


On Sun, Jun 22, 2014 at 11:23 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Sat, Jun 21, 2014 at 8:07 PM, Jakub Jelinek <jakub@redhat.com> wrote:
>
>>> > --- gcc/config/i386/driver-i386.c.jj    2014-05-14 14:45:54.000000000 +0200
>>> > +++ gcc/config/i386/driver-i386.c       2014-06-20 18:59:57.805006358 +0200
>>> > @@ -745,6 +745,11 @@ const char *host_detect_local_cpu (int a
>>> >                     /* Assume Core 2.  */
>>> >                     cpu = "core2";
>>> >                 }
>>> > +             else if (has_longmode)
>>> > +               /* Perhaps some emulator?  Assume x86-64, otherwise gcc
>>> > +                  -march=native would be unusable for 64-bit compilations,
>>> > +                  as all the CPUs below are 32-bit only.  */
>>> > +               cpu = "x86-64";
>>> >               else if (has_sse3)
>>> >                 /* It is Core Duo.  */
>>> >                 cpu = "pentium-m";
>>> >
>>> >         Jakub
>>>
>>> host_detect_local_cpu guesses the cpu based on the real processors.
>>> It doesn't work with emulators due to some conflicts.  This isn't the
>>> only only place which has the same issue.   I prefer something like
>>> this.
>>
>> I'm fine with your patch too.  Let's wait what Uros (or other i?86
>> maintainers) pick up.
>
> This looks OK to me.
>
> Thanks,
> Uros.

This is what I checked in.

Thanks.

-- 
H.J.
---
Index: ChangeLog
===================================================================
--- ChangeLog (revision 211900)
+++ ChangeLog (working copy)
@@ -1,3 +1,9 @@
+2014-06-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+ PR target/61570
+ * config/i386/driver-i386.c (host_detect_local_cpu): Set arch
+ to x86-64 if a 32-bit processor supports SSE2 and 64-bit.
+
 2014-06-23  James Greenhalgh  <james.greenhalgh@arm.com>

  * config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
Index: config/i386/driver-i386.c
===================================================================
--- config/i386/driver-i386.c (revision 211900)
+++ config/i386/driver-i386.c (working copy)
@@ -415,6 +415,7 @@ const char *host_detect_local_cpu (int a
   bool arch;

   unsigned int l2sizekb = 0;
+  unsigned int arch_64bit = 1;

   if (argc < 1)
     return NULL;
@@ -656,11 +657,14 @@ const char *host_detect_local_cpu (int a
     {
     case PROCESSOR_I386:
       /* Default.  */
+      arch_64bit = 0;
       break;
     case PROCESSOR_I486:
+      arch_64bit = 0;
       cpu = "i486";
       break;
     case PROCESSOR_PENTIUM:
+      arch_64bit = 0;
       if (arch && has_mmx)
  cpu = "pentium-mmx";
       else
@@ -745,21 +749,25 @@ const char *host_detect_local_cpu (int a
     /* Assume Core 2.  */
     cpu = "core2";
  }
-      else if (has_sse3)
- /* It is Core Duo.  */
- cpu = "pentium-m";
-      else if (has_sse2)
- /* It is Pentium M.  */
- cpu = "pentium-m";
-      else if (has_sse)
- /* It is Pentium III.  */
- cpu = "pentium3";
-      else if (has_mmx)
- /* It is Pentium II.  */
- cpu = "pentium2";
       else
- /* Default to Pentium Pro.  */
- cpu = "pentiumpro";
+ {
+  arch_64bit = 0;
+  if (has_sse3)
+    /* It is Core Duo.  */
+    cpu = "pentium-m";
+  else if (has_sse2)
+    /* It is Pentium M.  */
+    cpu = "pentium-m";
+  else if (has_sse)
+    /* It is Pentium III.  */
+    cpu = "pentium3";
+  else if (has_mmx)
+    /* It is Pentium II.  */
+    cpu = "pentium2";
+  else
+    /* Default to Pentium Pro.  */
+    cpu = "pentiumpro";
+ }
     }
   else
     /* For -mtune, we default to -mtune=generic.  */
@@ -773,21 +781,30 @@ const char *host_detect_local_cpu (int a
   if (has_longmode)
     cpu = "nocona";
   else
-    cpu = "prescott";
+    {
+      cpu = "prescott";
+      arch_64bit = 0;
+    }
  }
       else
- cpu = "pentium4";
+ {
+  cpu = "pentium4";
+  arch_64bit = 0;
+ }
       break;
     case PROCESSOR_GEODE:
+      arch_64bit = 0;
       cpu = "geode";
       break;
     case PROCESSOR_K6:
+      arch_64bit = 0;
       if (arch && has_3dnow)
  cpu = "k6-3";
       else
  cpu = "k6";
       break;
     case PROCESSOR_ATHLON:
+      arch_64bit = 0;
       if (arch && has_sse)
  cpu = "athlon-4";
       else
@@ -896,6 +913,10 @@ const char *host_detect_local_cpu (int a
       const char *xsavec = has_xsavec ? " -mxsavec" : " -mno-xsavec";
       const char *xsaves = has_xsaves ? " -mxsaves" : " -mno-xsaves";

+      /* Assume x86-64 if a 32-bit processor supports SSE2 and 64-bit.  */
+      if (arch_64bit == 0 && has_sse2 && has_longmode)
+ cpu = "x86-64";
+
       options = concat (options, mmx, mmx3dnow, sse, sse2, sse3, ssse3,
  sse4a, cx16, sahf, movbe, aes, sha, pclmul,
  popcnt, abm, lwp, fma, fma4, xop, bmi, bmi2,


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]