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Re: [PATCH][AARCH64]Support full addressing modes for ldr/str in vectorization scenarios


On 3 June 2014 12:08, Marcus Shawcroft <marcus.shawcroft@gmail.com> wrote:
> On 28 May 2014 08:30, Bin.Cheng <amker.cheng@gmail.com> wrote:
>>> So is it OK?
>>>
>>>
>>> 2014-05-28  Bin Cheng  <bin.cheng@arm.com>
>>>
>>>         * config/aarch64/aarch64.c (aarch64_classify_address)
>>>         (aarch64_legitimize_reload_address): Support full addressing modes
>>>         for vector modes.
>>>         * config/aarch64/aarch64.md (mov<mode>, movmisalign<mode>)
>>>         (*aarch64_simd_mov<mode>, *aarch64_simd_mov<mode>): Relax
>>> predicates.
>
> OK Thanks /Marcus

Hi Bin,

This resolves an ICE in 4.9 in Neon intrinsics code, so I'd like to
see it backported to the branch too, please.

Thanks
Charles


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