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Re: [RFC][AArch64] Define TARGET_SPILL_CLASS


On Wed, May 21, 2014 at 4:44 PM, Kugan
<kugan.vivekanandarajah@linaro.org> wrote:
> Compiling some applications with -mgeneral-regs-only produces better
> code (runs faster) compared to not using it. The difference here is that
> when -mgeneral-regs-only is not used, floating point register are also
> used in register allocation. Then IRA/LRA has to move them to core
> registers before performing operations.
>
> I experimented with TARGET_SPILL_CLASS (as in attached patch) to make
> floating point register class as just spill class for integer pseudos.
> Though this benefits the application which had this issue. Overall
> performance with speck2k is neutral (some of the benchmarks benefits a
> lot but others regress). I am looking to see if I can make it perform
> better overall. Any suggestions welcome.
>
> Attached experimental patch passes regression but 168.wupwise and
> 187.facerec miscompares now. I am looking at fixing this as well.
>
> Thanks,
> Kugan
>
> gcc/
> 2014-05-22  Kugan Vivekanandarajah  <kuganv@linaro.org>
>
>         * config/aarch64/aarch64.c (generic_regmove_cost) : Adjust GP2FP and
>         FP2GP costs.
>         (aarch64_spill_class) : New function.


>         (TARGET_SHIFT_TRUNCATION_MASK) : Define.

No you are not defining TARGET_SHIFT_TRUNCATION_MASK, remove it from
the changelog.

Thanks,
Andrew Pinski


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