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Re: [PATCH][AARCH64] Support tail indirect function call


On 18 March 2014 14:13, Jiong Wang <> wrote:

>     * config/aarch64/ (aarch64_call_insn_operand): New
> predicate.
>     * config/aarch64/ ("Ucs", "Usf"):  New constraints.
>     * config/aarch64/ (*sibcall_insn, *sibcall_value_insn): Adjust
> for
>     tailcalling through registers.
>     * config/aarch64/aarch64.h (enum reg_class): New caller save register
> class.
>     (REG_CLASS_NAMES): Likewise.
>     (REG_CLASS_CONTENTS): Likewise.
>     * config/aarch64/aarch64.c (aarch64_function_ok_for_sibcall): Allow
> tailcalling
>     without decls.
> gcc/testsuite
>     * New test.

Couple of comments:

+typedef void FP(int);

GNU style please, space before (.

+void f1(FP fp, int n) { (fp)(n); }

GNU style please, line breaks after void, '(' and ';'. Space between
')' an '('. Likewise in the following line.

We should really follow the test case name convention, see, specifically paragraph 1.

+(define_register_constraint "Ucs" "CALLER_SAVE_REGS"
+ "@internal The caller save registers.  Useful for sibcalls.")

Please move this hunk up and place with the other
define_register_constraints.  Line break after @internal like the
other entries in this file  Drop the "Useful for ..." part of the

+   br\\t%0
+   b\\t%a0"
   [(set_attr "type" "branch")]

Don't forget to add another attribute value for the new alternative.
Likewise is the following pattern.


Register classes should be ordered such that if class x is contained
in class y, class x has the lower number therefore CALLER_SAVE_REGS
should be above CORE_REG.


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