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Hi James Thank you for pointing this out. In the new patch I removed the modification of vqdmulh_n_s32 and vqdmulhq_n_s32. Passed dejagnu testing on aarch64 qemu again. OK for trunk, 4.9 and 4.8? 2014-05-20 Guozhi Wei <carrot@google.com> * config/aarch64/arm_neon.h (vqdmulh_n_s16): Change the last operand's constraint. (vqdmulhq_n_s16): Likewise. On Mon, May 19, 2014 at 11:50 PM, James Greenhalgh <james.greenhalgh@arm.com> wrote: > On Tue, May 20, 2014 at 07:18:40AM +0100, Carrot Wei wrote: >> Hi > > Hi, > >> The last operand of instruction sqdmulh can only be low fp registers, >> so we should use constraint "x". But the intrinsic functions use "w". >> This patch fixed the constrains in these intrinsics. > > This restriction is only on the _s16 variants of the intrinsics. From the > ARMv8 Architecture Reference Manual: > > <Vm> Is the name of the second SIMD&FP source register, > [...] > Restricted to V0-V15 when element size <Ts> is H. > > The patch is correct (though I can't approve it) for vqdmulh_n_s16 and > vqdmulhq_n_s16, but the two hunks for vqdmulh_n_s32 and vqdmulhq_n_s32 should > be dropped as they are too restrictive. > > Thanks, > James > >> 2014-05-19 Guozhi Wei <carrot@google.com> >> >> * config/aarch64/arm_neon.h (vqdmulh_n_s16): Change >> the last operand's constraint. >> (vqdmulh_n_s32): Likewise. >> (vqdmulhq_n_s16): Likewise. >> (vqdmulhq_n_s32): Likewise. >
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