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Re: [PATCH, PR61219]: Fix sNaN handling in ARM float to double conversion
- From: Aurelien Jarno <aurelien at aurel32 dot net>
- To: Joey Ye <joey dot ye dot cc at gmail dot com>
- Cc: gcc-patches <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 19 May 2014 08:48:09 +0200
- Subject: Re: [PATCH, PR61219]: Fix sNaN handling in ARM float to double conversion
- Authentication-results: sourceware.org; auth=none
- References: <20140518212338 dot GA16272 at volta dot rr44 dot fr> <CAL0py24WDQ9GkaayCszgJb-MZi4qExZPJm2Fov7p9Ai4zNy74Q at mail dot gmail dot com>
On Mon, May 19, 2014 at 02:08:06PM +0800, Joey Ye wrote:
> If f2d need fix, then please fix d2f too as current implementation for
> both behave similarly.
I have done some tests with double to float conversion, and the NaN
behaviour is correct. This is due to specific code handling that in
d2f:
3: @ chech for NAN
mvns r3, r2, asr #21
bne 5f @ simple overflow
orrs r3, xl, xh, lsl #12
do_it ne, tt
movne r0, #0x7f000000
orrne r0, r0, #0x00c00000
RETc(ne) @ return NAN
Aurelien
> On Mon, May 19, 2014 at 5:23 AM, Aurelien Jarno <aurelien@aurel32.net> wrote:
> > On ARM soft-float, the float to double conversion doesn't convert a sNaN
> > to qNaN as the IEEE Std 754 standard mandates:
> >
> > "Under default exception handling, any operation signaling an invalid
> > operation exception and for which a floating-point result is to be
> > delivered shall deliver a quiet NaN."
> >
> > Given the soft float ARM code ignores exceptions and always provides a
> > result, a float to double conversion of a signaling NaN should return a
> > quiet NaN. Fix this in extendsfdf2.
> >
> >
> > 2014-05-18 Aurelien Jarno <aurelien@aurel32.net>
> >
> > PR target/61219
> > * config/arm/ieee754-df.S (extendsfdf2): Convert sNaN to qNaN.
> >
> >
> > Index: libgcc/config/arm/ieee754-df.S
> > ===================================================================
> > --- libgcc/config/arm/ieee754-df.S (revision 210588)
> > +++ libgcc/config/arm/ieee754-df.S (working copy)
> > @@ -473,11 +473,15 @@
> > eorne xh, xh, #0x38000000 @ fixup exponent otherwise.
> > RETc(ne) @ and return it.
> >
> > - teq r2, #0 @ if actually 0
> > - do_it ne, e
> > - teqne r3, #0xff000000 @ or INF or NAN
> > + bics r2, r2, #0xff000000 @ isolate mantissa
> > + do_it eq @ if 0, that is ZERO or INF,
> > RETc(eq) @ we are done already.
> >
> > + teq r3, #0xff000000 @ check for NAN
> > + do_it eq, t
> > + orreq xh, xh, #0x00080000 @ change to quiet NAN
> > + RETc(eq) @ and return it.
> > +
> > @ value was denormalized. We can normalize it now.
> > do_push {r4, r5, lr}
> > mov r4, #0x380 @ setup corresponding exponent
> >
> > --
> > Aurelien Jarno GPG: 4096R/1DDD8C9B
> > aurelien@aurel32.net http://www.aurel32.net
>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://www.aurel32.net