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RE: [PATCH] [MIPS] Fix operands for microMIPS SW16, SH16 and SB16
- From: Matthew Fortune <Matthew dot Fortune at imgtec dot com>
- To: Richard Sandiford <rdsandiford at googlemail dot com>, "Maciej W. Rozycki" <macro at codesourcery dot com>
- Cc: "Moore, Catherine" <Catherine_Moore at mentor dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 15 Apr 2014 10:31:38 +0000
- Subject: RE: [PATCH] [MIPS] Fix operands for microMIPS SW16, SH16 and SB16
- Authentication-results: sourceware.org; auth=none
- References: <FD3DCEAC5B03E9408544A1E416F1124201497ED8A4 at NA-MBX-04 dot mgc dot mentorg dot com> <6D39441BF12EF246A7ABCE6654B023534E17E5 at LEMAIL01 dot le dot imgtec dot org> <87zjjrxb11 dot fsf at talisman dot default> <87r452ygnm dot fsf at talisman dot default> <alpine dot DEB dot 1 dot 10 dot 1404141725530 dot 15259 at tp dot orcam dot me dot uk> <8761ma2ab7 dot fsf at sandifor-thinkpad dot stglab dot manchester dot uk dot ibm dot com>
Richard Sandiford <email@example.com> writes:
> "Maciej W. Rozycki" <firstname.lastname@example.org> writes:
> > On Sat, 12 Apr 2014, Richard Sandiford wrote:
> >> I went ahead and applied the adjusted version of the patch to trunk
> >> as below (because I wanted to add a testcase too).
> > I believe you need to adjust constraints to ensure constant 0 is
> > known to produce a 16-bit instruction encoding where possible.
> > Otherwise you'll end up with suboptimal code when the instruction is
> > in a branch delay slot.
> Yeah, it'd be good to do that too (although this is a preexisting
> I'm relying on you guys to do the microMIPS stuff though -- I don't have
> a way of testing it.
FYI, we have GNUSIM patches awaiting submission to add micromips support.
We are waiting on copyright assignment for GDB which is why they are not
available yet. We were planning on getting them submitting as 'on behalf
of' but it seems this may not be permitted any more by FSF.