This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH v7] PR middle-end/60281


Thanks Jakub
--
Regards
lin zuojian

On Tue, Mar 04, 2014 at 10:15:31AM +0100, Jakub Jelinek wrote:
> On Tue, Mar 04, 2014 at 04:44:57PM +0800, lin zuojian wrote:
> > On Tue, Mar 04, 2014 at 09:04:56AM +0100, Jakub Jelinek wrote:
> > > On Tue, Mar 04, 2014 at 11:11:45AM +0800, lin zuojian wrote:
> > > > Without aligning the asan stack base,this base will only 64-bit aligned in ARM machines.
> > > > But asan require 256-bit aligned base because of this:
> > > > 1.right shift take ASAN_SHADOW_SHIFT(which is 3) bits are zeros
> > > > 2.store multiple/load multiple instructions require the other 2 bits are zeros
> > > > 
> > > > that add up lowest 5 bits should be zeros.That means 32 bytes or 256 bits aligned.
> > > > 
> > > >     * asan.c (asan_emit_stack_protection): Force the base to align to
> > > >     appropriate bits if STRICT_ALIGNMENT.  Set shadow_mem align to
> > > >     appropriate bits if STRICT_ALIGNMENT.
> > > >     * cfgexpand.c (expand_stack_vars): Set base_align appropriately
> > > >     when asan is on.
> > > >     (expand_used_vars): Leave a space in the stack frame for alignment if
> > > >     STRICT_ALIGNMENT.
> > > 
> > > There were still a couple of formatting issues, I've fixed them below.
> > > Now, do you have a GCC copyright assignment or are under copyright
> > > assignment of some company working on GCC (ARM?)?
> > Thanks for the fixing!.
> > I have none of them.I have read the website,but don't know what exactly
> > I am expecting to do.
> 
> Please follow
> http://git.savannah.gnu.org/cgit/gnulib.git/plain/doc/Copyright/request-assign.future
> 
> 	Jakub


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]