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Hi, Few AVR Xmega devices have specific instruction support than the architecture it belongs to. For example atxmega128b1 device has RMW instructions (XCH,LAC, LAS and LAT) support, but not all avrxmega6 devices have. Now, avr-gcc passes architecture name to assembler instead of device name. So, RMW instructions are not recognized (illegal opcode error) by assembler. To address this issue, we could add device specific ISA to device details in GCC. Driver can pass additional option based on specific ISA that a device has. Assembler can add device specific ISA to architecture ISA based on the option it receives. I have attached patches for avr-gcc. device-specific-isa-avr-gcc.patch: * Device specific ISA information is added to device details. * avr-gcc passes -mrmw option to assembler if the selected device has RMW instruction support. Submitted patch for binutils to handle -mrmw option: https://sourceware.org/ml/binutils/2014-03/msg00011.html Please review the attached patch and comment. - Please ignore the below cross posting. http://lists.nongnu.org/archive/html/avr-gcc-list/2014-02/msg00014.html Thanks, Pitchumani gcc/ChangeLog 2014-03-03 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * config/avr/avr-arch.h: Add avr_additional_isa enum to have device specific ISA information. (avr_mcu_t): Add additional_isa field for device specific ISA. * config/avr/avr-devices.c (avr_mcu_types): Update AVR_MCU macro to include additional isa field. * config/avr/avr-mcus.def: Update device details with corresponding additional isa info. * config/avr/driver-avr.c (avr_device_to_as): Pass -mrmw option to assembler if RMW isa supported by current device. * config/avr/genmultilib.awk: Update as device info structure changed. gcc/testsuite/ChangeLog 2014-03-03 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * gcc.target/avr/additional-isa.c: New test.
Attachment:
device-specific-isa-avr-gcc.patch
Description: device-specific-isa-avr-gcc.patch
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