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Re: [PATCH] [rtl-optimization/49847] Fix cse to handle cc0 setter and cc0 user in different blocks


On Thu, Feb 27, 2014 at 11:50 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Thu, Feb 27, 2014 at 11:02 AM, Jeff Law <law@redhat.com> wrote:
>>
>> As discussed in 49847, a few years ago GCC was changed to add EH edges for
>> exceptions that might arise from a floating point comparison.  That change
>> made it possible for a cc0-setter and cc0-user to end up in different
>> blocks, separated by a NOTE.
>>
>> After discussing reverting the change, duplicating the cc0-setter and a
>> couple other ideas, eventually Richi and myself settled on relaxing the long
>> standing restrictions on the relative locations of the cc0 setter and cc0
>> user.
>>
>> We agreed to update the documentation and fault in fixes due to low priority
>> of cc0 targets (and doubly so since this really only affects cc0 targets
>> with used with non-call-exceptions).
>>
>> This patch updates the documentation and fixes the only known failure due to
>> this change in cse.c with a patch from Mikael.
>>
>> Tested with a cross compiler.  I'll probably fire off a m68k bootstrap for
>> good measure, but it'll be several days before that completes.
>>
>> Installed on the trunk.
>>
>> Jeff
>>
>> diff --git a/gcc/ChangeLog b/gcc/ChangeLog
>> index 8a78716..a20cee3 100644
>> --- a/gcc/ChangeLog
>> +++ b/gcc/ChangeLog
>> @@ -1,3 +1,12 @@
>> +2014-02-27  Mikael Pettersson  <mikpe@it.uu.se>
>> +           Jeff Law  <law@redhat.com>
>> +
>> +       PR rtl-optimization/49847
>> +       * cse.c (fold_rtx) Handle case where cc0 setter and cc0 user
>> +       are in different blocks.
>> +       * doc/tm.texi (Condition Code Status): Update documention for
>> +       relative locations of cc0-setter and cc0-user.
>> +
>
> This breaks bootstrap:
>
> You should edit ../../src-trunk/gcc/doc/tm.texi.in rather than
> ../../src-trunk/gcc/doc/tm.texi .
> make[6]: *** [s-tm-texi] Error 1
> make[6]: *** Waiting for unfinished jobs....
>

I checked in this as an obvious fix.

-- 
H.J.
---
Index: ChangeLog
===================================================================
--- ChangeLog (revision 208204)
+++ ChangeLog (working copy)
@@ -1,3 +1,8 @@
+2014-02-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+ * doc/tm.texi.in (Condition Code Status): Update documention for
+ relative locations of cc0-setter and cc0-user.
+
 2014-02-27  Jeff Law  <law@redhat.com>

  PR rtl-optimization/52714
Index: doc/tm.texi.in
===================================================================
--- doc/tm.texi.in (revision 208204)
+++ doc/tm.texi.in (working copy)
@@ -4484,8 +4484,13 @@ most instructions do not affect it.  The
 most RISC machines.

 The implicit clobbering poses a strong restriction on the placement of
-the definition and use of the condition code, which need to be in adjacent
-insns for machines using @code{(cc0)}.  This can prevent important
+the definition and use of the condition code.  In the past the definition
+and use were always adjacent.  However, recent changes to support trapping
+arithmatic may result in the definition and user being in different blocks.
+Thus, there may be a @code{NOTE_INSN_BASIC_BLOCK} between them.  Additionally,
+the definition may be the source of exception handling edges.
+
+These restrictions can prevent important
 optimizations on some machines.  For example, on the IBM RS/6000, there
 is a delay for taken branches unless the condition code register is set
 three instructions earlier than the conditional branch.  The instruction


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