This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[PATCH,rs6000,committed] Loosen assert in rs6000_emit_le_vsx_move


Hi,

There's an assert in rs6000_emit_le_vsx_move () that was correct for
-mcpu=power7, but with the TImode changes for Power8, we can trigger the
assert with -mcpu=power8 on little endian.  We can now see a dest rtx
that is a vector subreg of TImode.  Allowing for this in the assert
fixes a failure in the test suite.

Bootstrapped and tested on powerpc64{,le}-unknown-linux-gnu with no
regressions.  Committed as obvious.

Thanks,
Bill


2014-02-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_emit_le_vsx_move): Relax assert
	to permit subregs.


Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	(revision 208050)
+++ gcc/config/rs6000/rs6000.c	(working copy)
@@ -8040,7 +8040,7 @@ rs6000_emit_le_vsx_move (rtx dest, rtx source, enu
 
   if (MEM_P (source))
     {
-      gcc_assert (REG_P (dest));
+      gcc_assert (REG_P (dest) || GET_CODE (dest) == SUBREG);
       rs6000_emit_le_vsx_load (dest, source, mode);
     }
   else



Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]