[AArch64 13/14] Initial tuning description for XGene-1 core.

[Philipp Tomsich <philipp dot tomsich at theobroma-systems dot com>]

The generic cost model for AArch64 can not be used to capture the
microarchitectural cost of XGene-1 in full detail.  For this reason,
we use the basic tuning model of the Cortex-A53 for now.
---
 gcc/config/aarch64/aarch64-cores.def |  2 +-
 gcc/config/aarch64/aarch64.c         | 28 ++++++++++++++++++++++++++++
 2 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index b4f6c16..abbfea9 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -36,7 +36,7 @@
 
 AARCH64_CORE("cortex-a53",  cortexa53, cortexa53, 8,  AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa53)
 AARCH64_CORE("cortex-a57",  cortexa15, cortexa15, 8,  AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, generic)
-AARCH64_CORE("xgene1",      xgene1,    xgene1,    8,  AARCH64_FL_FPSIMD, generic)
+AARCH64_CORE("xgene1",      xgene1,    xgene1,    8,  AARCH64_FL_FPSIMD, xgene1)
 
 /* V8 big.LITTLE implementations.  */
 
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 4327eb3..4c06f9b 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -192,6 +192,20 @@ static const struct cpu_regmove_cost generic_regmove_cost =
   NAMED_PARAM (FP2FP, 4)
 };
 
+static const struct cpu_regmove_cost xgene1_regmove_cost =
+{
+  NAMED_PARAM (GP2GP, 1),
+  /* We want all GP2FP and FP2GP moves to be handled by a reload.
+     A direct move instruction will have similar microarchitectural
+     cost to a store/load combination.  */
+  NAMED_PARAM (GP2FP, 4),
+  NAMED_PARAM (FP2GP, 4),
+  /* We currently do not provide direct support for TFmode Q->Q move.
+     Therefore we need to raise the cost above 2 in order to have
+     reload handle the situation.  */
+  NAMED_PARAM (FP2FP, 4)
+};
+
 /* Generic costs for vector insn classes.  */
 #if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
 __extension__
@@ -237,6 +251,20 @@ static const struct tune_params cortexa53_tunings =
   NAMED_PARAM (branch_cost, 2)
 };
 
+/* We can't model the microarchitectural costs on XGene using  the default
+   cost model for AArch64.  So we leave the extra cost structure pointing
+   to the default cost model for the time being.  */
+static const struct tune_params xgene1_tunings =
+{
+  &cortexa53_extra_costs,
+  &generic_addrcost_table,
+  &xgene1_regmove_cost,
+  &generic_vector_cost,
+  NAMED_PARAM (memmov_cost, 4),
+  NAMED_PARAM (issue_rate, 4),
+  NAMED_PARAM (branch_cost, 2)
+};
+
 /* A processor implementing AArch64.  */
 struct processor
 {
-- 
1.9.0