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Re: [PATCH] Vector mode addresses
- From: Richard Biener <richard dot guenther at gmail dot com>
- To: Jakub Jelinek <jakub at redhat dot com>
- Cc: Paulo Matos <paulo at matos-sorge dot com>, Paulo Matos <pmatos at broadcom dot com>, Richard Sandiford <rdsandiford at googlemail dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Fri, 31 Jan 2014 10:24:44 +0100
- Subject: Re: [PATCH] Vector mode addresses
- Authentication-results: sourceware.org; auth=none
- References: <19EB96622A777C4AB91610E763265F463F2CB9 at SJEXCHMB14 dot corp dot ad dot broadcom dot com> <8738k5d4j2 dot fsf at talisman dot default> <19EB96622A777C4AB91610E763265F463F2E6F at SJEXCHMB14 dot corp dot ad dot broadcom dot com> <CAFiYyc0KxgQXT-iw3zTkKfp4seOWtQxQ+CLWUDAo1LwdkZzUoQ at mail dot gmail dot com> <52EAB5C3 dot 7010001 at matos-sorge dot com> <20140130204700 dot GH892 at tucnak dot redhat dot com>
On Thu, Jan 30, 2014 at 9:47 PM, Jakub Jelinek <jakub@redhat.com> wrote:
> On Thu, Jan 30, 2014 at 08:27:47PM +0000, Paulo Matos wrote:
>> Yes, it looks strange but it was the way we came up with to
>> implement an instruction that loads from a pair of addresses.
>>
>> From what I wrote previously to Richard.
>> "We have an instruction that loads two 32 bit values into a lower
>> and upper parts of a 64bit register using a base register and a 64
>> bit register used as a double index.
>> So,
>> r1 <- [r0, r2]
>> means:
>> low(r1) = [r0 + low(r2)]
>> high(r1) = [r0 + high(r2)]"
>
> That sounds like gather instruction e.g. i?86 AVX2/AVX512F has.
> I don't like using vector mode for the address though, i?86 uses UNSPECs and
> IMNSHO you should too. Or express it as vec_concat of two MEM loads
> where address of each one will be the base + vec_select of the vector
> register.
Yeah, I don't like it either. It opens a whole can of worms I think.
Richard.
> Jakub