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Re: [PATCH] Support addsub/subadd as non-isomorphic operations for SLP vectorizer.


Hello!

> In consequence, the ix86_expand_multi_arg_builtin() function tries to
> check two args but based on the define_expand of xop_vmfrcz<mode>2,
> the content of insn_data[CODE_FOR_xop_vmfrczv4sf2].operand[2] may be
> incorrect (because it only needs one input).

 ;; scalar insns
-(define_expand "xop_vmfrcz<mode>2"
+(define_expand "xop_vmfrcz<mode>3"
   [(set (match_operand:VF_128 0 "register_operand")
        (vec_merge:VF_128
          (unspec:VF_128
           [(match_operand:VF_128 1 "nonimmediate_operand")]
           UNSPEC_FRCZ)
-         (match_dup 3)
+         (match_operand:VF_128 2 "register_operand")
          (const_int 1)))]
   "TARGET_XOP"
 {
-  operands[3] = CONST0_RTX (<MODE>mode);
+  operands[2] = CONST0_RTX (<MODE>mode);
 })

No, just use (match_dup 2) in the RTX in addition to operands[2]
change. Do not rename patterns.

Uros.


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