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Re: [PATCH i386 8/8] [AVX-512] Add SHA support.
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: Kirill Yukhin <kirill dot yukhin at gmail dot com>
- Cc: Richard Henderson <rth at redhat dot com>, Jakub Jelinek <jakub at redhat dot com>, Jeff Law <law at redhat dot com>, GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Tue, 19 Nov 2013 15:36:25 +0100
- Subject: Re: [PATCH i386 8/8] [AVX-512] Add SHA support.
- Authentication-results: sourceware.org; auth=none
- References: <20131119124119 dot GJ25998 at msticlxl57 dot ims dot intel dot com>
On Tue, Nov 19, 2013 at 1:41 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
> Hello,
> This patch introduces new SHA instructions described in [1]
> along with tests.
>
> Testing:
> 1. Bootstrap pass.
> 2. make check shows no regressions.
> 3. Spec 2000 & 2006 build show no regressions both with and without -mavx512f option.
> 4. Spec 2000 & 2006 run shows no stability regressions without -mavx512f option.
>
> ChangeLog entry:
> 2013-11-18 Alexander Ivchenko <alexander.ivchenko@intel.com>
> Maxim Kuznetsov <maxim.kuznetsov@intel.com>
> Sergey Lega <sergey.s.lega@intel.com>
> Anna Tikhonova <anna.tikhonova@intel.com>
> Ilya Tocar <ilya.tocar@intel.com>
> Andrey Turetskiy <andrey.turetskiy@intel.com>
> Ilya Verbin <ilya.verbin@intel.com>
> Kirill Yukhin <kirill.yukhin@intel.com>
> Michael Zolotukhin <michael.v.zolotukhin@intel.com>
>
> * common/config/i386/i386-common.c (OPTION_MASK_ISA_SHA_SET): New.
> (OPTION_MASK_ISA_SHA_UNSET): Ditto.
> (ix86_handle_option): Handle OPT_msha.
> * config.gcc (extra_headers): Add shaintrin.h.
> * config/i386/cpuid.h (bit_SHA): New.
> * config/i386/driver-i386.c (host_detect_local_cpu): Detect SHA
> instructions.
> * config/i386/i386-c.c (ix86_target_macros_internal): Handle
> OPTION_MASK_ISA_SHA.
> * config/i386/i386.c (ix86_target_string): Add -msha.
> (ix86_option_override_internal): Add PTA_SHA.
> (ix86_valid_target_attribute_inner_p): Handle OPT_msha.
> (enum ix86_builtins): Add IX86_BUILTIN_SHA1MSG1,
> IX86_BUILTIN_SHA1MSG2, IX86_BUILTIN_SHA1NEXTE, IX86_BUILTIN_SHA1RNDS4,
> IX86_BUILTIN_SHA256MSG1, IX86_BUILTIN_SHA256MSG2,
> IX86_BUILTIN_SHA256RNDS2.
> (bdesc_args): Add BUILTINS defined above.
> (ix86_init_mmx_sse_builtins): Add __builtin_ia32_sha1msg1,
> __builtin_ia32_sha1msg2, __builtin_ia32_sha1nexte,
> __builtin_ia32_sha1rnds4, __builtin_ia32_sha256msg1,
> __builtin_ia32_sha256msg2, __builtin_ia32_sha256rnds2.
> (ix86_expand_args_builtin): Handle V4SI_FTYPE_V4SI_V4SI_V4SI, add
> warning for CODE_FOR_sha1rnds4.
> * config/i386/i386.h (TARGET_SHA): New.
> (TARGET_SHA_P): Ditto.
> * config/i386/i386.opt (-msha): Document it.
> * config/i386/immintrin.h: Add shaintrin.h.
> * config/i386/shaintrin.h: New.
> * config/i386/sse.md (unspec): Add UNSPEC_SHA1MSG1, UNSPEC_SHA1MSG2,
> UNSPEC_SHA1NEXTE, UNSPEC_SHA1RNDS4, UNSPEC_SHA256MSG1,
> UNSPEC_SHA256MSG2, UNSPEC_SHA256RNDS2.
> (sha1msg1): New.
> (sha1msg2): Ditto.
> (sha1nexte): Ditto.
> (sha1rnds4): Ditto.
> (sha256msg1): Ditto.
> (sha256msg2): Ditto.
> (sha256rnds2): Ditto.
> * doc/invoke.texi: Add -msha, -mno-sha.
>
> testsuite/ChangeLog entry:
> 2013-11-18 Alexander Ivchenko <alexander.ivchenko@intel.com>
> Maxim Kuznetsov <maxim.kuznetsov@intel.com>
> Sergey Lega <sergey.s.lega@intel.com>
> Anna Tikhonova <anna.tikhonova@intel.com>
> Ilya Tocar <ilya.tocar@intel.com>
> Andrey Turetskiy <andrey.turetskiy@intel.com>
> Ilya Verbin <ilya.verbin@intel.com>
> Kirill Yukhin <kirill.yukhin@intel.com>
> Michael Zolotukhin <michael.v.zolotukhin@intel.com>
>
> * gcc.target/i386/avx-1.c: Add define for __builtin_ia32_sha1rnds4.
> * gcc.target/i386/i386.exp (check_effective_target_sha): New.
> * gcc.target/i386/sha-check.h: New file.
> * gcc.target/i386/sha1msg1-1.c: Ditto.
> * gcc.target/i386/sha1msg1-2.c: Ditto.
> * gcc.target/i386/sha1msg2-1.c: Ditto.
> * gcc.target/i386/sha1msg2-2.c: Ditto.
> * gcc.target/i386/sha1nexte-1: Ditto.
> * gcc.target/i386/sha1nexte-2: Ditto.
> * gcc.target/i386/sha1rnds4-1.c: Ditto.
> * gcc.target/i386/sha1rnds4-2.c: Ditto.
> * gcc.target/i386/sha256msg1-1.c: Ditto.
> * gcc.target/i386/sha256msg1-2.c: Ditto.
> * gcc.target/i386/sha256msg2-1.c: Ditto.
> * gcc.target/i386/sha256msg2-2.c: Ditto.
> * gcc.target/i386/sha256rnds2-1.c: Ditto.
> * gcc.target/i386/sha256rnds2-2.c: Ditto.
> * gcc.target/i386/sse-13.c: Add __builtin_ia32_sha1rnds4.
> * gcc.target/i386/sse-14.c: Add _mm_sha1rnds4_epu32.
> * gcc.target/i386/sse-22.c: Ditto.
> * gcc.target/i386/sse-23.c: Add __builtin_ia32_sha1rnds4.
Please also add new command options to g++.dg/other/sse-2.C and
g++.dg/other/sse-3.C
OK with the small nit below and with above testsute addition.
> Patch in the bottom.
>
> Is it ok for trunk?> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -663,7 +663,7 @@ Objective-C and Objective-C++ Dialects}.
> -mrecip -mrecip=@var{opt} @gol
> -mvzeroupper -mprefer-avx128 @gol
> -mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
> --mavx2 -mavx512f -mavx512pf -mavx512er -mavx512cd @gol
> +-mavx2 -mavx512f -mavx512pf -mavx512er -mavx512cd -msha -mno-sha @gol
No need to document negative option here.
Thanks,
Uros.