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RE: [PATCH] reimplement -fstrict-volatile-bitfields v4, part 1/2


>
> But then why is the mode QImode in the first place? The access is
> definitely of SImode.
>

that's in the test case:

  s->arr[0] = 0x12345678;


it is QImode from that in expand_assignment:

      to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);

tem is "s", a MEM_REF, of QImode, perfectly aligned. the mode is only
OK to access *s or s->pad. It is wrong for s->srr[0].
in store_bit_field the mode is used in store_fixed_bit_field:

      mode = GET_MODE (op0);
      if (GET_MODE_BITSIZE (mode) == 0
          || GET_MODE_BITSIZE (mode)> GET_MODE_BITSIZE (word_mode))
        mode = word_mode;
      mode = get_best_mode (bitsize, bitnum, bitregion_start, bitregion_end,
                            MEM_ALIGN (op0), mode, MEM_VOLATILE_P (op0));

      if (mode == VOIDmode)
        goto boom;

so this restricts the possible access mode. word_mode, means no restriction.
Everything would be OK if MEM_ALIGN(op0) was byte-aligned, but we have
a problem if MEM_ALIGN(op0)>=WORD_MODE.

Do you understand?

Bernd. 		 	   		  

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