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Re: Committed: Adjust testsuite for ARC LOGICAL_OP_NON_SHORT_CIRCUIT definition.
- From: Richard Biener <richard dot guenther at gmail dot com>
- To: Joern Rennecke <joern dot rennecke at embecosm dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Wed, 13 Nov 2013 10:36:18 +0100
- Subject: Re: Committed: Adjust testsuite for ARC LOGICAL_OP_NON_SHORT_CIRCUIT definition.
- Authentication-results: sourceware.org; auth=none
- References: <20131111135030 dot 5nwf7c2o4kocskoo-nzlynne at webmail dot spamcop dot net>
On Mon, Nov 11, 2013 at 7:50 PM, Joern Rennecke
<joern.rennecke@embecosm.com> wrote:
>
Bah - so many ;) Seems to ask for a
dg-effective-target-logical-op-non-short-circuit ;)
> 2013-11-11 Joern Rennecke <joern.rennecke@embecosm.com>
>
> * gcc.dg/tree-ssa/forwprop-28.c: Adjust for ARC
> LOGICAL_OP_NON_SHORT_CIRCUIT definition.
> * gcc.dg/tree-ssa/ssa-dom-thread-4.c: Likewise.
> * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise.
> * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise.
> * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise.
> * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise.
> * gcc.dg/tree-ssa/vrp47.c: Likewise.
> * gcc.dg/tree-ssa/vrp87.c: Likewise.
>
> Index: gcc.dg/tree-ssa/forwprop-28.c
> ===================================================================
> --- gcc.dg/tree-ssa/forwprop-28.c (revision 204665)
> +++ gcc.dg/tree-ssa/forwprop-28.c (working copy)
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-*"} } } */
> +/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
> /* { dg-options "-O2 -fdump-tree-forwprop1" } */
>
> extern char *frob (void);
> Index: gcc.dg/tree-ssa/ssa-dom-thread-4.c
> ===================================================================
> --- gcc.dg/tree-ssa/ssa-dom-thread-4.c (revision 204665)
> +++ gcc.dg/tree-ssa/ssa-dom-thread-4.c (working copy)
> @@ -61,7 +61,7 @@ bitmap_ior_and_compl (bitmap dst, const_
> zero. */
> /* ARM Cortex-M0 defined LOGICAL_OP_NON_SHORT_CIRCUIT to false,
> so skip below test. */
> -/* { dg-final { scan-tree-dump-times "Threaded" 3 "dom1" { target { ! { {
> mips*-*-* avr-*-* } || { arm_cortex_m && arm_thumb1 } } } } } } */
> +/* { dg-final { scan-tree-dump-times "Threaded" 3 "dom1" { target { ! { {
> mips*-*-* avr-*-* arc*-*-* } || { arm_cortex_m && arm_thumb1 } } } } } } */
> /* MIPS defines LOGICAL_OP_NON_SHORT_CIRCUIT to 0, so we split both
> "a_elt || b_elt" and "b_elt && kill_elt" into two conditions each,
> rather than using "(var1 != 0) op (var2 != 0)". Also, as on other
> targets,
> @@ -81,8 +81,9 @@ bitmap_ior_and_compl (bitmap dst, const_
> -> "kill_elt->indx == b_elt->indx" in the second condition,
> skipping the known-true "b_elt && kill_elt" in the second
> condition. */
> +/* Likewise for arc. */
> /* For avr, BRANCH_COST is by default 0, so the default
> LOGICAL_OP_NON_SHORT_CIRCUIT definition also computes as 0. */
> -/* { dg-final { scan-tree-dump-times "Threaded" 6 "dom1" { target mips*-*-*
> avr-*-* } } } */
> +/* { dg-final { scan-tree-dump-times "Threaded" 6 "dom1" { target mips*-*-*
> avr-*-* arc*-*-* } } } */
> /* { dg-final { cleanup-tree-dump "dom1" } } */
>
> Index: gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
> ===================================================================
> --- gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c (revision 204665)
> +++ gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c (working copy)
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-*"} } } */
> +/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
>
> /* { dg-options "-O2 -g -fdump-tree-optimized" } */
> /* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
> Index: gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
> ===================================================================
> --- gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c (revision 204665)
> +++ gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c (working copy)
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-*"} } } */
> +/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
>
> /* { dg-options "-O2 -g -fdump-tree-optimized" } */
> /* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
> Index: gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
> ===================================================================
> --- gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c (revision 204665)
> +++ gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c (working copy)
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-*"} } } */
> +/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
>
> /* { dg-options "-O2 -g -fdump-tree-optimized" } */
> /* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
> Index: gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
> ===================================================================
> --- gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c (revision 204665)
> +++ gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c (working copy)
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-*"} } } */
> +/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
>
> /* { dg-options "-O2 -g -fdump-tree-optimized" } */
> /* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
> Index: gcc.dg/tree-ssa/vrp47.c
> ===================================================================
> --- gcc.dg/tree-ssa/vrp47.c (revision 204665)
> +++ gcc.dg/tree-ssa/vrp47.c (working copy)
> @@ -1,9 +1,9 @@
> -/* Skip on MIPS, where LOGICAL_OP_NON_SHORT_CIRCUIT inhibits the setcc
> +/* Skip on MIPS/ARC, where LOGICAL_OP_NON_SHORT_CIRCUIT inhibits the setcc
> optimizations that expose the VRP opportunity. */
> /* Skip on S/390 and avr. Lower values in BRANCH_COST lead to two
> conditional
> jumps when evaluating an && condition. VRP is not able to optimize
> this. */
> -/* { dg-do compile { target { ! "mips*-*-* s390*-*-* avr-*-* mn10300-*-*"
> } } } */
> +/* { dg-do compile { target { ! "mips*-*-* arc*-*-* s390*-*-* avr-*-*
> mn10300-*-*" } } } */
> /* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-dom1 -fdump-tree-vrp2" }
> */
> /* { dg-additional-options "-march=i586" { target { { i?86-*-* x86_64-*-* }
> && ia32 } } } */
> /* Skip on ARM Cortex-M0, where LOGICAL_OP_NON_SHORT_CIRCUIT is set to
> false,
> Index: gcc.dg/tree-ssa/vrp87.c
> ===================================================================
> --- gcc.dg/tree-ssa/vrp87.c (revision 204665)
> +++ gcc.dg/tree-ssa/vrp87.c (working copy)
> @@ -1,4 +1,4 @@
> -/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-*"} } } */
> +/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-*
> v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-*
> powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
>
> /* { dg-options "-O2 -fdump-tree-vrp2-details -fdump-tree-cddce2-details" }
> */
> /* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
>