Re: [PATCH, powerpc] PR target/58673: Fix power8 quad memory/no-vsx-timode interaction (revised)

[Michael Meissner <meissner at linux dot vnet dot ibm dot com>]

On Mon, Oct 14, 2013 at 08:51:15PM -0400, David Edelsohn wrote:
> > [gcc]
> > 2013-10-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
> >
> >         PR target/58673
> >         * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only
> >         restrict TImode addresses to single indirect registers if both
> >         -mquad-memory and -mvsx-timode are used.
> >         (rs6000_output_move_128bit): Use quad_load_store_p to determine if
> >         we should emit load/store quad.  Remove using %y for quad memory
> >         addresses.
> >
> >         * config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add
> >         constraints to allow load/store quad on machines where TImode is
> >         not allowed in VSX registers.
> >
> > [gcc/testsuite]
> > 2013-10-11  Michael Meissner  <meissner@linux.vnet.ibm.com>
> >
> >         PR target/58673
> >         * gcc.target/powerpc/pr58673-1.c: New file to test whether
> >         -mquad-word + -mno-vsx-timode causes errors.
> >         * gcc.target/powerpc/pr58673-2.c: Likewise.
> 
> This is okay, except:
> 
> -  [(set (match_operand:TI2 0 "nonimmediate_operand" "=Y,r,r,r")
> -    (match_operand:TI2 1 "input_operand" "r,Y,r,F"))]
> +  [(set (match_operand:TI2 0 "nonimmediate_operand" "=wQ,Y,r,r,r,r")
> +    (match_operand:TI2 1 "input_operand" "r,r,wQ,Y,r,F"))]
> 
> As Ken Zadeck and Richard Sandiford noticed this morning, the "F"
> constraint seems to be a cut-and-paste error because the "F"
> constraint corresponds to an immediate scalar or vector float value,
> which never will match TImode. Should this constraint be "n"?
> 
> The GCC testsuite apparently is missing a test to ensure that a large
> TImode immediate value can be loaded on targets that support int128_t.

I changed this to use the 'n' constraint.  This is the patch I committed:

[gcc]
2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/58673
	* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only
	restrict TImode addresses to single indirect registers if both
	-mquad-memory and -mvsx-timode are used.
	(rs6000_output_move_128bit): Use quad_load_store_p to determine if
	we should emit load/store quad.  Remove using %y for quad memory
	addresses.

	* config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add
	constraints to allow load/store quad on machines where TImode is
	not allowed in VSX registers.  Use 'n' instead of 'F' constraint
	for TImode to load integer constants.

[gcc/testsuite]
2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/58673
	* gcc.target/powerpc/pr58673-1.c: New file to test whether
	-mquad-word + -mno-vsx-timode causes errors.
	* gcc.target/powerpc/pr58673-2.c: Likewise.


-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797

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