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Re: [PATCH, RTL] Prepare ARM build with LRA
- From: Yvan Roux <yvan dot roux at linaro dot org>
- To: Iain Sandoe <iain at codesourcery dot com>, Eric Botcazou <ebotcazou at adacore dot com>, "rdsandiford at googlemail dot com" <rdsandiford at googlemail dot com>
- Cc: GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Thu, 26 Sep 2013 13:39:55 +0200
- Subject: Re: [PATCH, RTL] Prepare ARM build with LRA
- Authentication-results: sourceware.org; auth=none
- References: <CAD57uCe9maOqrnmt2yXMDHgMcjzyxxHGSnP2QLbmOxrP_dH1BQ at mail dot gmail dot com> <99A90FCD-7F00-4FB3-9D26-3D971DFCE81A at codesourcery dot com>
(Added Eric and Richard)
Sorry for the inconvenience Iain, It's ok for my side.
Thanks,
Yvan
On 26 September 2013 13:18, Iain Sandoe <iain@codesourcery.com> wrote:
> Hi Yvan,
>
> On 24 Sep 2013, at 09:29, Yvan Roux wrote:
>
>>> On 11 September 2013 21:08, Yvan Roux <yvan.roux@linaro.org> wrote:
>>>> Here is the new patch discussed in the other thread.
>>>>
>>>> Thanks
>>>> Yvan
>>>>
>>>> 2013-09-11 Yvan Roux <yvan.roux@linaro.org>
>>>> Vladimir Makarov <vmakarov@redhat.com>
>>>>
>>>> * rtlanal.c (lsb_bitfield_op_p): New predicate for bitfield operations
>>>> from the least significant bit.
>>>> (strip_address_mutations): Add bitfield operations handling.
>>>> (shift_code_p): New predicate for shifting operations.
>>>> (must_be_index_p): Add shifting operations handling.
>>>> (set_address_index): Likewise.
>
> as discussed on irc, this part (applied as r202914) breaks bootstrap on powerpc-darwin9 (and, presumably, other BE targets) with a signed/unsigned compare error at rtlanal.c:5482
>
> below is a trivial patch, which makes both parts of test signed.
> With this, bootstrap completes on powerpc-darwin9 - however, you might want to check that it still does what you intended.
>
> thanks
> Iain
>
> diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
> index 24cbcd2..0349bcc 100644
> --- a/gcc/rtlanal.c
> +++ b/gcc/rtlanal.c
> @@ -5476,7 +5476,7 @@ lsb_bitfield_op_p (rtx x)
> if (GET_RTX_CLASS (GET_CODE (x)) == RTX_BITFIELD_OPS)
> {
> enum machine_mode mode = GET_MODE (XEXP (x, 0));
> - unsigned HOST_WIDE_INT len = INTVAL (XEXP (x, 1));
> + HOST_WIDE_INT len = INTVAL (XEXP (x, 1));
> HOST_WIDE_INT pos = INTVAL (XEXP (x, 2));
>
> return (pos == (BITS_BIG_ENDIAN ? GET_MODE_PRECISION (mode) - len : 0));
>