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Re: RFC: patch to build GCC for arm with LRA


here is a status of LRA on ARM, after Vladimir's patch and a rebase of
my branch:


No more issues in the testsuite, the libstdc++ ones weren't LRA
specific, they happened at the pass manager level and due to PCH
inclusion, but were fixed with the trunk update. Thus, I'll post a
patch to enable LRA on AArch64, but it is still needed to have the RTL
analyser patch accepted.


No more issues in libstdc++ as well (same as reasons as AArch64), and
only 3 failures in the testsuite:
- The first one is invalid as the test sans the assembler for
"ldaex\tr\[0-9\]+..." and it fails because with LRA the chosen
register is r12 and thus the instruction is "ldaex  ip,..."
- The two others are the same bug where LRA keeps some REG_NOTES (DEAD
and UNUSED) on a comparison pattern where reload removes then, and the
results is that the comparison is removed.  I'm currently working on
this issue.
- Thumb still doesn't bootstrap.


On 11 September 2013 20:57, Yvan Roux <> wrote:
>> Yeah, good point.  TBH I prefer it with separate ifs though, because the
>> three cases are dealing with three different types of rtl (unary, binary
>> and ternary).  But I don't mind much either way.
> Ok, it's fine for me too.
>> The new patch looks good to me, thanks.  Just one minor style nit:
>> "return false" rather than "return 0" for the bool.  Maybe also change:
>>         /* Bitfield operations [SIGN|ZERO]_EXTRACT from the least significant
>>            bit can be used too.  */
>> to something like:
>>         /* A [SIGN|ZERO]_EXTRACT from the least significant bit effectively
>>            acts as a combined truncation and extension.  */
> Yeah, its clearer.  I'll post the new patch in the other thread.
>> I really will try to make that my last comment and leave things open
>> for an official review :-)
> :-) once again many thanks for your help Richard.
> Cheers,
> Yvan

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