Index: gcc/testsuite/gcc.dg/builtin-apply2.c
===================================================================
--- gcc/testsuite/gcc.dg/builtin-apply2.c	(revision 201726)
+++ gcc/testsuite/gcc.dg/builtin-apply2.c	(working copy)
@@ -1,6 +1,7 @@
 /* { dg-do run } */
 /* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "aarch64*-*-* avr-*-* " } { "*" } { "" } } */
 /* { dg-skip-if "Variadic funcs use Base AAPCS.  Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */
+/* { dg-skip-if "Variadic funcs use Base AAPCS.  Normal funcs use VFP variant." { "arm*-*-gnueabihf" } { "*" } { "-mfloat-abi=soft*" } } */
 
 /* PR target/12503 */
 /* Origin: <pierre.nguyen-tuong@asim.lip6.fr> */
Index: gcc/testsuite/gcc.dg/tls/pr42894.c
===================================================================
--- gcc/testsuite/gcc.dg/tls/pr42894.c	(revision 201726)
+++ gcc/testsuite/gcc.dg/tls/pr42894.c	(working copy)
@@ -1,6 +1,7 @@
 /* PR target/42894 */
 /* { dg-do compile } */
 /* { dg-options "-march=armv5te -mthumb" { target arm*-*-* } } */
+/* { dg-options "-march=armv5te -mthumb -mfloat-abi=soft" { target arm*-*-*hf } } */
 /* { dg-require-effective-target tls } */
 
 extern __thread int t;
Index: gcc/testsuite/gcc.target/arm/thumb-ltu.c
===================================================================
--- gcc/testsuite/gcc.target/arm/thumb-ltu.c	(revision 201726)
+++ gcc/testsuite/gcc.target/arm/thumb-ltu.c	(working copy)
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv6" "-march=armv6j" "-march=armv6z" } } */
-/* { dg-options "-mcpu=arm1136jf-s -mthumb -O2" } */
+/* { dg-options "-mcpu=arm1136jf-s -mthumb -O2 -mfloat-abi=soft" } */
 
 void f(unsigned a, unsigned b, unsigned c, unsigned d)
 {
Index: gcc/testsuite/lib/target-supports.exp
===================================================================
--- gcc/testsuite/lib/target-supports.exp	(revision 201726)
+++ gcc/testsuite/lib/target-supports.exp	(working copy)
@@ -2445,6 +2445,11 @@
 	# Must generate floating-point instructions.
 	return 0
     }
+    if [check-flags [list "" { *-*-gnueabihf } { "*" } { "" } ]] {
+        # Use existing float-abi and force an fpu which supports fp16
+	set et_arm_fp16_flags "-mfpu=vfpv4"
+	return 1;
+    }
     if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
         # The existing -mfpu value is OK; use it, but add softfp.
 	set et_arm_fp16_flags "-mfloat-abi=softfp"