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Re: [PATCH] x86-64 gcc generate wrong assembly instruction movabs for intel syntax


On Mon, Aug 12, 2013 at 5:26 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Mon, Aug 12, 2013 at 11:24 AM, Perez Read <netfirewall@gmail.com> wrote:
>
>>>> movabs is incorrectly translated into "mov [rax], -1", and causes
>>>> compile error "Error: ambiguous operand size for `mov' ".
>>>> It should be "mov QWORD PTR [rax], -1"
>>>>
>>>> Bootstrap passed. Regression tested on x86_64-unknown-linux-gnu (pc).
>>>>
>>>> 2013-08-10  Perez Read <netfirewall@gmail.com>
>>>>
>>>>         * config/i386/i386.md (*movabs<mode>_1) :  Add <ptrsize> PTR before
>>>>         operand 0 for intel asm alternative.
>>>>
>>>>         * testsuite/gcc.target/i386/movabs-1.c : New test.
>>>
>>> You should mention PR number in the ChangeLog.
>>>
>>> Looks OK, but I think that for consistency this decoration should also
>>> be added to *movabs<mode>_2 pattern.
>>>
>>> Uros.
>>
>> Hello,
>>
>> After the test, I think we can skip this pattern.
>> Because the operand 0 must be the register, the assembler will
>> determine the size automatically.
>
> As said, I don't want two similar patterns with a different asm
> template in i386.md. So, if decorating movabs<mode>_2 works OK, I
> propose to change both patterns with your change.
>
> Uros.

Sorry for forgetting to Cc the mailing list.

There are new patch and changelog. Add "<ptrsize> PTR" to both patterns.
Bootstrap passed,  Regression tested on x86_64-unknown-linux-gnu (pc).

2013-08-10  Perez Read <netfirewall@gmail.com>

         PR target/58132

         * config/i386/i386.md (*movabs<mode>_1) :  Add <ptrsize> PTR before
         operand 0 for intel asm alternative.

         * testsuite/gcc.target/i386/movabs-1.c : New test.

2013-08-12  Perez Read <netfirewall@gmail.com>

         PR target/58132

         * config/i386/i386.md (*movabs<mode>_2) :  Add <ptrsize> PTR before
         operand 1 for intel asm alternative.


Thanks,
Perez

Attachment: movabs.patch
Description: Binary data


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