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Re: [PATCH] x86-64 gcc generate wrong assembly instruction movabs for intel syntax
- From: Perez Read <netfirewall at gmail dot com>
- To: Uros Bizjak <ubizjak at gmail dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Mon, 12 Aug 2013 17:24:11 +0800
- Subject: Re: [PATCH] x86-64 gcc generate wrong assembly instruction movabs for intel syntax
- References: <CAFULd4YQZKujRexrf77+CK9=Ru-Oq9pJMwtiTJJ+xn-9oZgykg at mail dot gmail dot com>
On Mon, Aug 12, 2013 at 2:52 PM, Uros Bizjak <ubizjak@gmail.com> wrote:
> Hello!
>
>> movabs is incorrectly translated into "mov [rax], -1", and causes
>> compile error "Error: ambiguous operand size for `mov' ".
>> It should be "mov QWORD PTR [rax], -1"
>>
>> Bootstrap passed. Regression tested on x86_64-unknown-linux-gnu (pc).
>>
>> 2013-08-10 Perez Read <netfirewall@gmail.com>
>>
>> * config/i386/i386.md (*movabs<mode>_1) : Add <ptrsize> PTR before
>> operand 0 for intel asm alternative.
>>
>> * testsuite/gcc.target/i386/movabs-1.c : New test.
>
> You should mention PR number in the ChangeLog.
>
> Looks OK, but I think that for consistency this decoration should also
> be added to *movabs<mode>_2 pattern.
>
> Uros.
Hello,
After the test, I think we can skip this pattern.
Because the operand 0 must be the register, the assembler will
determine the size automatically.
Perez
Fixed ChangeLog
2013-08-10 Perez Read <netfirewall@gmail.com>
PR target/58132
* config/i386/i386.md (*movabs<mode>_1) : Add <ptrsize> PTR before
operand 0 for intel asm alternative.
* testsuite/gcc.target/i386/movabs-1.c : New test.