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Re: [PATCH, rs6000] Add builtin support for power8 32-bit Altivec multiply insns
- From: David Edelsohn <dje dot gcc at gmail dot com>
- To: Peter Bergner <bergner at vnet dot ibm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Fri, 2 Aug 2013 17:13:56 -0400
- Subject: Re: [PATCH, rs6000] Add builtin support for power8 32-bit Altivec multiply insns
- References: <1375381260 dot 5336 dot 12 dot camel at otta>
On Thu, Aug 1, 2013 at 2:21 PM, Peter Bergner <firstname.lastname@example.org> wrote:
> This patch adds builtin support for the new 32-bit Altivec multiply
> instructions that were added in ISA 2.07 (ie, POWER8).
> This passed bootstrap and regtesting with no errors. Ok for mainline?
The builtins and patterns seem to be in a random order. Sometimes
signed is first and sometimes unsigned is first. Please make the
ordering of the names consistent.
If these operations are multiplies, why are they described as UNSPEC
instead of MULT with SELECT?