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Re: [AARCH64][Insn classification unification 4/N] load/store types
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Sofiane Naci <sofiane dot naci at arm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Fri, 02 Aug 2013 14:05:58 +0100
- Subject: Re: [AARCH64][Insn classification unification 4/N] load/store types
- References: <000001ce8f80$adf232c0$09d69840$ at firstname.lastname@example.org>
On 02/08/13 14:03, Sofiane Naci wrote:
> This patch is part of the ongoing work to unify instruction classification
> between the ARM and AARCH64 backends.
> This patch adds "load_acq" and "store_rel" types for classifying load
> acquire and store release instructions respectively. It also updates the
> ARMv8 pipeline descriptions.
> OK for trunk?
> * config/arm/types.md (define_attr "type"): Add "load_acq" and
> * config/arm/cortex-a53.md (cortex_a53_load1): Update for attribute
> (cortex_a53_store1): Likewise.