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Re: msp430 port
- From: Jeff Law <law at redhat dot com>
- To: DJ Delorie <dj at redhat dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Tue, 30 Jul 2013 12:24:10 -0600
- Subject: Re: msp430 port
- References: <51E700D1 dot 702 at redhat dot com> <201307232208 dot r6NM8QpY018297 at greed dot delorie dot com>
On 07/23/2013 04:08 PM, DJ Delorie wrote:
Index: gcc/cfgexpand.c
===================================================================
--- gcc/cfgexpand.c (revision 201184)
+++ gcc/cfgexpand.c (working copy)
I thought I already approved this. Go ahead and install it.
Index: gcc/simplify-rtx.c
===================================================================
--- gcc/simplify-rtx.c (revision 201184)
+++ gcc/simplify-rtx.c (working copy)
Testcase? Explanation? This seems like you're papering over a bug.
Index: gcc/dwarf2cfi.c
===================================================================
--- gcc/dwarf2cfi.c (revision 201184)
+++ gcc/dwarf2cfi.c (working copy)
@@ -277,12 +277,19 @@ expand_builtin_init_dwarf_reg_sizes (tre
{
if (save_mode == VOIDmode)
continue;
wrote_return_column = true;
}
size = GET_MODE_SIZE (save_mode);
+
+ /* Entries in the dwarf_reg_size_table must be big enough to hold an _Unwind_Word
+ even if this is bigger than reg_raw_mode. This can happen on targets where the
+ pointer size is larger than the integer size, and not a power-of-two. (Eg MSP430). */
+ if (size < GET_MODE_SIZE (targetm.unwind_word_mode ()))
+ size = GET_MODE_SIZE (targetm.unwind_word_mode ());
So was there a discussion of this patch? Presumably BITS_PER_WORD is 16
and you've got 20 bit pointers which causes this problem, right?
I think you should go ahead and install this patch as well.
+; Note: using POPM.A #1 is two bytes smaller than using POPX.A....
+
+(define_insn "movsipsi2"
+ [(set (match_operand:PSI 0 "register_operand" "=r")
+ (subreg:PSI (match_operand:SI 1 "register_operand" "r") 0))]
+ "TARGET_LARGE"
+ "PUSH.W %H1 { PUSH.W %1 { POPM.A #1, %0"
+)
So how is this different fram
(set (psi) (truncate:psi (si)))?
+)
+
+; This pattern is needed in order to avoid reload problems.
+; It takes an SI pair of registers, adds a value to them, and
+; then converts them into a single PSI register.
+
+(define_insn "addsipsi3"
+ [(set (subreg:SI (match_operand:PSI 0 "register_operand" "=&r") 0)
+ (plus:SI (match_operand:SI 1 "register_operand" "0")
+ (match_operand 2 "general_operand" "rmi")))
+ (clobber (reg:CC CARRY))
+ ]
+ ""
+ "ADD.W\t%L2, %L0 { ADDC.W\t%H2, %H0 { PUSH.W %H0 { PUSH.W %L0 { POPM.A #1, %0"
+
Is it possible the insns which resulted in adding this pattern came from
trying to zero/sign extend the frame pointer, then the frame pointer
gets eliminated and turns into a (plus (sp) (const_int)?
I dealt with this by having a special alternative to the
zero_extendpsisi2 and extendpsi_si2 patterns. I used a constraint which
matched sp + offset. Feels cleaner as we don't have the subreg in there.
Jeff