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Re: MIPS elimate trap-if-zero instruction if possible for divisions
- From: Jeff Law <law at redhat dot com>
- To: Graham Stott <graham dot stott at btinternet dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, rdsandiford at googlemail dot com
- Date: Tue, 09 Jul 2013 16:26:05 -0600
- Subject: Re: MIPS elimate trap-if-zero instruction if possible for divisions
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On 07/09/2013 11:28 AM, Richard Sandiford wrote:
Thinking through it a bit more, expand is probably better -- assuming
the bits to attach VRP info to SSA_NAMEs and work out as we hope.
Graham Stott <firstname.lastname@example.org> writes:
Hi Richard, Jeff.
Richard what's your idea for exposing things early enough so that VRP
can eliminate the need for a trao-if-zero insn iif possible.
Well, I was thinking of doing it in expand. I.e. get the MIPS div*, mod*
and divmod* patterns to emit an explicit trap-if-zero or branch-around-
break sequence. (The div* and mod* patterns are in loongson.md.)
With Jeff's comment about VRP though, it sounds like he had different