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Re: [AArch64] Improve description of <F>CM instructions in RTL


OK
/Marcus

On 30 April 2013 15:55, James Greenhalgh <james.greenhalgh@arm.com> wrote:
>
> Comparison operators can be described in RTL in a more accurate
> manner than simply using UNSPECs. Do this.
>
> We need the split cases for DI mode to give reload a sensible
> alternative. Without these, reload would churn out some truly
> ugly code along the lines of:
>
>> fmov d0, x0
>> cmp d0, d0, #0
>> fmov x0, d0
>
> Regression tested on aarch64-none-elf and aarch64-none-linux-gnu
> with no regressions.
>
> OK?
>
> Thanks,
> James
>
> ---
> gcc/
>
> 2013-04-30  James Greenhalgh  <james.greenhalgh@arm.com>
>
>         * config/aarch64/aarch64-simd-builtins.def (cmhs): Rename to...
>         (cmgeu): ...This.
>         (cmhi): Rename to...
>         (cmgtu): ...This.
>         * config/aarch64/aarch64-simd.md
>         (simd_mode): Add SF.
>         (aarch64_vcond_internal): Use new names for unsigned comparison insns.
>         (aarch64_cm<optab><mode>): Rewrite to not use UNSPECs.
>         * config/aarch64/aarch64.md (*cstore<mode>_neg): Rename to...
>         (cstore<mode>_neg): ...This.
>         * config/aarch64/iterators.md
>         (VALLF): new.
>         (unspec): Remove UNSPEC_CM<EQ, LE, LT, GE, GT, HS, HI, TST>.
>         (COMPARISONS): New.
>         (UCOMPARISONS): Likewise.
>         (optab): Add missing comparisons.
>         (n_optab): New.
>         (cmp_1): Likewise.
>         (cmp_2): Likewise.
>         (CMP): Likewise.
>         (cmp): Remove.
>         (VCMP_S): Likewise.
>         (VCMP_U): Likewise.
>         (V_cmp_result): Add DF, SF modes.
>         (v_cmp_result): Likewise.
>         (v): Likewise.
>         (vmtype): Likewise.
>         * config/aarch64/predicates.md (aarch64_reg_or_fp_zero): New.


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