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Re: [PATCH] Improve vec_widen_?mult_odd_* (take 2)
- From: Uros Bizjak <ubizjak at gmail dot com>
- To: Jakub Jelinek <jakub at redhat dot com>
- Cc: Richard Henderson <rth at redhat dot com>, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Mon, 29 Apr 2013 08:33:29 +0200
- Subject: Re: [PATCH] Improve vec_widen_?mult_odd_* (take 2)
- References: <20130426222058 dot GU28963 at tucnak dot redhat dot com> <CAFULd4Yk9kAOtKOOjTnHK0T7qphWKSgRKf6bembhAS9Gi2jaWg at mail dot gmail dot com> <20130428214306 dot GZ28963 at tucnak dot redhat dot com>
On Sun, Apr 28, 2013 at 11:43 PM, Jakub Jelinek <jakub@redhat.com> wrote:
> On Sat, Apr 27, 2013 at 11:07:50AM +0200, Uros Bizjak wrote:
>> Yes, please add a new predicate, the pattern is much more descriptive
>> this way. (Without the predicate, it looks like an expander that
>> generates a RTX fragment, used instead of gen_RTX... sequences).
>
> Ok, updated patch below. Bootstrapped/regtested again on x86_64-linux and
> i686-linux.
>
>> OTOH, does vector mode "general_operand" still accept scalar
>> immediates? The predicate, proposed above is effectively
>
> general_operand doesn't accept most of CONST_VECTOR constants (because they
> aren't targetm.legitimate_constant_p). It won't accept CONST_INT
> or CONST_DOUBLE due to:
> /* Don't accept CONST_INT or anything similar
> if the caller wants something floating. */
> if (GET_MODE (op) == VOIDmode && mode != VOIDmode
> && GET_MODE_CLASS (mode) != MODE_INT
> && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
> return 0;
>
> 2013-04-28 Jakub Jelinek <jakub@redhat.com>
>
> * config/i386/predicates.md (general_vector_operand): New predicate.
> * config/i386/i386.c (const_vector_equal_evenodd_p): New function.
> (ix86_expand_mul_widen_evenodd): Force op1 resp. op2 into register
> if they aren't nonimmediate operands. If their original values
> satisfy const_vector_equal_evenodd_p, don't shift them.
> * config/i386/sse.md (mul<mode>3): Use general_vector_operand
> predicates. For the SSE4.1 case force operands[{1,2}] into registers if
> not nonimmediate_operand.
> (vec_widen_smult_even_v4si): Use nonimmediate_operand predicates
> instead of register_operand.
> (vec_widen_<s>mult_odd_<mode>): Use general_vector_operand predicates.
OK for mainline.
Thanks,
Uros.