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Re: [AArch64] Fix vld1<q>_* asm constraints in arm_neon.h
- From: Marcus Shawcroft <marcus dot shawcroft at arm dot com>
- To: James Greenhalgh <James dot Greenhalgh at arm dot com>
- Cc: "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>
- Date: Wed, 24 Apr 2013 16:11:35 +0100
- Subject: Re: [AArch64] Fix vld1<q>_* asm constraints in arm_neon.h
- References: <1366814077-27335-1-git-send-email-james dot greenhalgh at arm dot com> <5177F58C dot 3060301 at arm dot com>
On 24/04/13 16:09, Marcus Shawcroft wrote:
On 24/04/13 15:34, James Greenhalgh wrote:
The vld1<q>_* patterns in arm_neon.h did not correctly describe
their register/memory constraints. This could lead to incorrect
code generation where they were used.
This patch fixes the bug by giving the patterns the correct
Regression tested on aarch64-none-elf without regressions.
2013-04-24 James Greenhalgh <firstname.lastname@example.org>
* config/aarch64/arm_neon.h (vld1<q>_lane*): Fix constraints.
(vld1<q>_dup_<sufp><8, 16, 32, 64>): Likewise.
(vld1<q>_<sufp><8, 16, 32, 64>): Likewise.
and backport to 4.8 and arm/4.7 please.